Nan Li

Affiliations:
  • National University of Defense Technology, College of Electronic Science and Technology, Changsha, China


According to our database1, Nan Li authored at least 20 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array.
Adv. Intell. Syst., December, 2022

In Situ Learning in Hardware Compatible Multilayer Memristive Spiking Neural Network.
IEEE Trans. Cogn. Dev. Syst., 2022

FPGA hardware implementation of Q-learning algorithm with low resource consumption.
Proceedings of the PRIS 2022: 4th International Conference on Pattern Recognition and Intelligent Systems, Wuhan, China, July 29, 2022

2021
In-situ learning in multilayer locally-connected memristive spiking neural network.
Neurocomputing, 2021

2020
Correlation-Based Calibration for Nonlinearity Mismatches in Dual-Channel TIADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Implication of unsafe writing on the MAGIC NOR gate.
Microelectron. J., 2020

Enhanced Spiking Neural Network with forgetting phenomenon based on electronic synaptic devices.
Neurocomputing, 2020

Solution to alleviate the impact of line resistance on the crossbar array.
IET Circuits Devices Syst., 2020

2019
Analysis, Design, and Order Estimation of Least-Squares FIR Equalizers for Bandwidth Extension of ADCs.
Circuits Syst. Signal Process., 2019

2018
Statistics-Based Correction Method for Sample-and-Hold Mismatch in 2-Channel TIADCs.
Proceedings of the 41st International Conference on Telecommunications and Signal Processing, 2018

2016
Integral Nonlinear Fitting and Calibration of High Precision Analog-Digital Converters.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016

2015
A Flash-aware Intra-disk Redundancy scheme for high reliable All Flash Array.
IEICE Electron. Express, 2015

FPGA logic design of SATA3.0 physical layer.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A new differential RAID for high reliable All Flash Array.
IEICE Electron. Express, 2014

Estimation method for nonlinearity mismatch in time-interleaved analog-to-digital converters.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Reconfigurable Bioimpedance Emulation System for Electrical Impedance Tomography System Validation.
IEEE Trans. Biomed. Circuits Syst., 2013

2012
High Accuracy Biological Impedance Measurement System Design and Calibration.
Proceedings of the Third International Conference on Digital Manufacturing & Automation, 2012

2011
High Speed Real-Time Data Acquisition System Based on Solid-State Storage Technique.
Proceedings of the Second International Conference on Digital Manufacturing and Automation, 2011

Design of a novel digital phantom for EIT system calibration.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

High-speed digital-controlled variable voltage source with current monitor for EIT application.
Proceedings of the 4th International Conference on Biomedical Engineering and Informatics, 2011


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