Hardware Trojan avoidance and detection for dynamically re-configurable FPGAs. - Nandeesha Veeranna; Benjamin Carrión Schäfer (FPT, 2016)

On Time Redundancy of Fault Tolerant C-Based MPSoCs. - Anjana Balachandran; Nandeesha Veeranna; Benjamin Carrión Schäfer (ISVLSI, 2016)

Efficient behavioral intellectual properties source code obfuscation for high-level synthesis. - Nandeesha Veeranna; Benjamin Carrión Schäfer (LATS, 2017)

Trust Filter: Runtime Hardware Trojan Detection in Behavioral MPSoCs. - Nandeesha Veeranna; Benjamin Carrión Schäfer (J. Hardw. Syst. Secur., 2017)

S3CBench: Synthesizable Security SystemC Benchmarks for High-Level Synthesis. - Nandeesha Veeranna; Benjamin Carrión Schäfer (J. Hardw. Syst. Secur., 2017)

Hardware Trojan Detection in Behavioral Intellectual Properties (IP's) Using Property Checking Techniques. - Nandeesha Veeranna; Benjamin Carrión Schäfer (IEEE Trans. Emerg. Top. Comput., 2017)

CIDPro: Custom Instructions for Dynamic Program Diversification. - Thinh Hung Pham; Alexander Fell; Arnab Kumar Biswas; Siew-Kei Lam; Nandeesha Veeranna (FPL, 2018)

Source Code Obfuscation of Behavioral IPs: Challenges and Solutions. - Nandeesha Veeranna; Benjamin Carrion Schafer (Behavioral Synthesis for Hardware Security, 2022)