Analysis of the Effect of QoS on Video Conferencing QoE. - Nanditha Rao; Amir Haghighati Maleki; Fu Chi Chen; Wenjun Chen; C. Zhang; Navneet Kaur; Anwar Haque (IWCMC, 2019)

The Characterization of Errors in an FPGA-Based RISC-V Processor due to Single Event Transients. - Jhalak Sharma; Nanditha Rao (Microelectron. J., 2022)

Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks. - Anubhav Mishra; Nanditha Rao; Ganesh Gore; Xifan Tang (APCCAS, 2023)

DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision. - Archie Mishra; Nanditha Rao (ISQED, 2023)

Sensing Timing Margin Contingencies in the Programmable Fabric of FPGAs. - Arun Iyer; Nishant Pawar; Dinesh Gaitonde; Nanditha Rao (ICFPT, 2024)

HiPC 2024 WORKSHOP 2: 1st Workshop on RecOnfigurable Computing and Systems (ROCS 2024). - Nanditha Rao; Jason Lin (HIPCW, 2024)

VPU-CIM: A 130nm, 33.98 TOPS/W RRAM based Compute-In-Memory Vector Co-Processor. - Chithambara Moorthii J; Vinay Rayapati; Nanditha Rao; Manan Suri (ISCAS, 2024)

FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation. - Vinay Rayapati; Gogireddy Ravi Kiran Reddy; Gandi Ajay Kumar; Saketh Gajawada; Sanampudi Gopala Krishna Reddy; Nanditha Rao (ISCAS, 2024)

Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs. - Jay Shah; Nanditha Rao (ISCAS, 2024)

HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond. - Stefan Abi-Karam; Rishov Sarkar; Allison Seigler; Sean Lowe; Zhigang Wei; Hanqiu Chen; Nanditha Rao; Lizy Kurian John; Aman Arora 001; Cong Hao (MLCAD, 2024)

FlexPE: Flexible Processing Elements for Workload Optimization and Acceleration on FPGAs. - Lasya Punya Sree Gundumogula; Rachana Kaparthi; Himanshu Rai; Nanditha Rao (ISCAS, 2025)

LUTAccel: Look-up-Table Based Vector Systolic Accelerator on FPGAs. - Aashish Kumar Tiwary; Saketh Gajawada; Jay Shah; Nanditha Rao (ISQED, 2025)

VFMA: Scalable Floating-Point Accelerator for Vector FMA on FPGAs. - Himanshu Rai; Sasi Snigdha Yadavalli; Aishwarya Sridhar; Nanditha Rao (ISVLSI, 2025)

FPUGen: A FrameWork to Generate Custom Floating Point FMA Accelerators on FPGAs. - Himanshu Rai; Aishwarya Sridhar; Wolfgang Ecker; Nanditha Rao (VLSID, 2025)