A Novel Hybrid Filter-Based PLL to Eliminate Effect of Input Harmonics and DC Offset. - Nanmu Hui; Dazhi Wang; Yunlu Li (IEEE Access, 2018)

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition. - Nanmu Hui; Yingying Feng; Xiaowei Han (IEEE Access, 2020)

A Novel Grid Synchronization Method Based on Hybrid Filter Under Distorted Voltage Conditions. - Nanmu Hui; Zongan Luo; Yingying Feng; Xiaowei Han (IEEE Access, 2020)

Grid synchronization method based on three novel types of third-order generalized integrators. - Nanmu Hui; Baoju Wu; Xiaowei Han (Comput. Electr. Eng., 2024)