A 113mm2 32Gb 3b/cell NAND flash memory. - Takuya Futatsuyama; Norihiro Fujita; Naoya Tokiwa; Yoshihiko Shindo; Toshiaki Edahiro; Teruhiko Kamei; Hiroaki Nasu; Makoto Iwai; Koji Kato; Yasuyuki Fukuda; Naoaki Kanagawa; Naofumi Abiko; et al. (ISSCC, 2009)

A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology. - Koichi Fukuda; Yoshihisa Watanabe; Eiichi Makino; Koichi Kawakami; Jumpei Sato; Teruo Takagiwa; Naoaki Kanagawa; Hitoshi Shiga; Naoya Tokiwa; Yoshihiko Shindo; Toshiaki Edahiro; Takeshi Ogawa; et al. (ISSCC, 2011)

A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface. - Noboru Shibata; Kazushige Kanda; Toshiki Hisada; Katsuaki Isobe; Manabu Sato; Yui Shimizu; Takahiro Shimizu; Takahiro Sugimoto; Tomohiro Kobayashi; Kazuko Inuzuka; Naoaki Kanagawa; Yasuyuki Kajitani; et al. (ISSCC, 2012)

A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology. - Koichi Fukuda; Yoshihisa Watanabe; Eiichi Makino; Koichi Kawakami; Jumpei Sato; Teruo Takagiwa; Naoaki Kanagawa; Hitoshi Shiga; Naoya Tokiwa; Yoshihiko Shindo; Takeshi Ogawa; Toshiaki Edahiro; et al. (IEEE J. Solid State Circuits, 2012)

A 19 nm 112.8 mm2 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface. - Kazushige Kanda; Noboru Shibata; Toshiki Hisada; Katsuaki Isobe; Manabu Sato; Yui Shimizu; Takahiro Shimizu; Takahiro Sugimoto; Tomohiro Kobayashi; Naoaki Kanagawa; Yasuyuki Kajitani; Takeshi Ogawa; et al. (IEEE J. Solid State Circuits, 2013)

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. - Hiroshi Maejima; Kazushige Kanda; Susumu Fujimura; Teruo Takagiwa; Susumu Ozawa; Jumpei Sato; Yoshihiko Shindo; Manabu Sato; Naoaki Kanagawa; Junji Musha; Satoshi Inoue; Katsuaki Sakurai; et al. (ISSCC, 2018)

13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs. - Toshiyuki Kouchi; Noriyasu Kumazaki; Masashi Yamaoka; Sanad Bushnaq; Takuyo Kodama; Yuki Ishizaki; Yoko Deguchi; Akio Sugahara; Akihiro Imamoto; Norichika Asaoka; Ryosuke Isomura; Takaya Handa; et al. (ISSCC, 2020)

A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs. - Toshiyuki Kouchi; Mami Kakoi; Noriyasu Kumazaki; Akio Sugahara; Akihiro Imamoto; Yasufumi Kajiyama; Yuri Terada; Sanad Bushnaq; Naoaki Kanagawa; Takuyo Kodama; Ryo Fukuda; Hiromitsu Komai; et al. (IEEE J. Solid State Circuits, 2021)

A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm2 bit density with 3.2Gbps interface and 205MB/s program throughput. - Mario Sako; T. Nakajima; Fumihiro Kono; Takeshi Nakano; Masaki Fujiu; Junji Musha; Dai Nakamura; Naoaki Kanagawa; Yutaka Shimizu; Kosuke Yanagidaira; Tetsuaki Utsumi; T. Kawano; et al. (VLSI Technology and Circuits, 2023)