MRAM Write Error Categorization with QCKB. - Yuui Shimizu; Hisanori Aikawa; Keiji Hosotani; Naoharu Shimomura; Tadashi Kai; Yoshihiro Ueda; Yoshiaki Asao; Yoshihisa Iwata; Kenji Tsuchida; Sumio Ikegawa (MTDT, 2006)

A 64Mb MRAM with clamped-reference and adequate-reference schemes. - Kenji Tsuchida; Tsuneo Inaba; Katsuyuki Fujita; Yoshihiro Ueda; Takafumi Shimizu; Yoshiaki Asao; Takeshi Kajiyama; Masayoshi Iwayama; Kuniaki Sugiura; Sumio Ikegawa; Tatsuya Kishi; Tadashi Kai; et al. (ISSCC, 2010)

Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU. - Hiroki Noguchi; Kazutaka Ikegami; Naoharu Shimomura; Tetsufumi Tanamoto; Junichi Ito; Shinobu Fujita (VLSIC, 2014)

7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using physically eliminated read-disturb scheme and normally-off memory architecture. - Hiroki Noguchi; Kazutaka Ikegami; Keiichi Kushida; Keiko Abe; Shogo Itai; Satoshi Takaya; Naoharu Shimomura; Junichi Ito; Atsushi Kawasumi; Hiroyuki Hara; Shinobu Fujita (ISSCC, 2015)

The progresses of MRAM as a memory to save energy consumption and its potential for further reduction. - Hiroaki Yoda; E. Kitagawa; Naoharu Shimomura; S. Fujita; Minoru Amano (VLSIC, 2015)

7.2 4Mb STT-MRAM-based cache with memory-access-aware power optimization and write-verify-write / read-modify-write scheme. - Hiroki Noguchi; Kazutaka Ikegami; Satoshi Takaya; Eishi Arima; Keiichi Kushida; Atsushi Kawasumi; Hiroyuki Hara; Keiko Abe; Naoharu Shimomura; Junichi Ito; Shinobu Fujita; Takashi Nakada; et al. (ISSCC, 2016)

High-Speed Magnetoresistive Random-Access Memory Random Number Generator Using Error-Correcting Code. - Tetsufumi Tanamoto; Naoharu Shimomura; Sumio Ikegawa; Mari Matsumoto; Shinobu Fujita; Hiroaki Yoda (CoRR, 2016)

High-speed voltage-control spintronics memory focused on reduction in write current. - Hideyuki Sugiyama; Hiroaki Yoda; Katsuhiko Koi; Soichi Oikawa; Buyandalai Altansargai; Tomoaki Inokuchi; Satoshi Shirotori; Mariko Shimizu; Yuichi Kato; Yuichi Ohsawa; Mizue Ishikawa; Ajay Tiwari; et al. (NVMTS, 2017)

High-Speed Voltage Control Spintronics Memory (VoCSM) Having Broad Design Windows. - Naoharu Shimomura; Hiroaki Yoda; Tomoaki Inokuchi; Katsuhiko Koi; Hideyuki Sugiyama; Yushi Kato; Yuichi Ohsawa; Altansargai Buyandalai; Satoshi Shirotori; Soichi Oikawa; Mariko Shimizu; Mizue Ishikawa; et al. (VLSI Circuits, 2018)