A Control Circuit Synthesis Method for Asynchronous Circuits in Bundled-Data Implementation. - Takao Konishi; Naohiro Hamada; Hiroshi Saito (CIT, 2007)

Scheduling Methods for Asynchronous Circuits with Bundled-Data Implementations Based on the Approximation of Start Times. - Hiroshi Saito; Naohiro Hamada; Nattha Jindapetch; Tomohiro Yoneda; Chris J. Myers; Takashi Nanya (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper). - Naohiro Hamada; Yuki Shiga; Hiroshi Saito; Tomohiro Yoneda; Chris J. Myers; Takashi Nanya (ACSD, 2008)

A Behavioral Synthesis System for Asynchronous Circuits with Bundled-data Implementation. - Naohiro Hamada; Yuki Shiga; Takao Konishi; Hiroshi Saito; Tomohiro Yoneda; Chris J. Myers; Takashi Nanya (IPSJ Trans. Syst. LSI Des. Methodol., 2009)

A floorplan method for asynchronous circuits with bundled-data implementation on FPGAs. - Hiroshi Saito; Naohiro Hamada; Tomohiro Yoneda; Takashi Nanya (ISCAS, 2010)

A tool set for the design of asynchronous circuits with bundled-data implementation. - Minoru Iizuka; Naohiro Hamada; Hiroshi Saito; Ryoichi Yamaguchi; Minoru Yoshinaga (ICCD, 2011)

Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data Implementation. - Naohiro Hamada; Hiroshi Saito (IEICE Trans. Electron., 2012)

An ASIC Design Support Tool Set for Non-pipelined Asynchronous Circuits with Bundled-Data Implementation. - Minoru Iizuka; Naohiro Hamada; Hiroshi Saito (IEICE Trans. Electron., 2013)