Performance improvement in a binary phase comparator type PLL frequency synthesizer. - Shigeki Obote; Yasuaki Sumi; Naoki Kitai; Yutaka Fukui; Yoshio Itoh (ISCAS (4), 1999)

Dead-zone-less PLL frequency synthesizer by hybrid phase detectors. - Yasuaki Sumi; Shigeki Obote; Naoki Kitai; Ryousuke Furuhashi; Hidekazu Ishii; Yoshitaka Matsuda; Yutaka Fukui (ISCAS (4), 1999)

PLL frequency synthesizer with an auxiliary programmable divider. - Yasuaki Sumi; Shigeki Obote; Naoki Kitai; Ryousuke Furuhashi; Yoshitaka Matsuda; Yutaka Fukui (ISCAS (2), 1999)

PLL synthesizer with multi-programmable divider and multi-phase detector. - Yasuaki Sumi; Shigeki Obote; Naoki Kitai; Hidekazu Ishii; Ryousuke Furuhashi (IEEE Trans. Consumer Electron., 1999)

Analysis of SRAM neutron-induced errors based on the consideration of both charge-collection and parasitic-bipolar failure modes. - Kenichi Osada; Naoki Kitai; Shiro Kamohara; Takayuki Kawahara (CICC, 2004)

Phase change RAM operated with 1.5-V CMOS as low cost embedded memory. - Kenichi Osada; Takayuki Kawahara; Riichiro Takemura; Naoki Kitai; Norikatsu Takaura; Nozomu Matsuzaki; Kenzo Kurotsuchi; Hiroshi Moriya; Masahiro Moniwa (CICC, 2005)

A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme. - Akira Kotabe; Kenichi Osada; Naoki Kitai; Mio Fujioka; Shiro Kamohara; Masahiro Moniwa; Sadayuki Morita; Yoshikazu Saitoh (IEEE J. Solid State Circuits, 2005)

A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current. - Satoru Hanzawa; Naoki Kitai; Kenichi Osada; Akira Kotabe; Yuichi Matsui; Nozomu Matsuzaki; Norikatsu Takaura; Masahiro Moniwa; Takayuki Kawahara (ISSCC, 2007)