A passive equalizer and its design methodology for global interconnects in VLSIs. - Moritoshi Yasunaga; Naoki Yokoshima; Ikuo Yoshihara (VLSI-SoC, 2016)

Evolutionary design of high signal integrity interconnection based on eye-diagram. - Tetsuya Odaira; Naoki Yokoshima; Ikuo Yoshihara; Moritoshi Yasunaga (Artif. Life Robotics, 2018)