A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI. - Takanori Komuro; Naoto Hayasaka; Haruo Kobayashi 001; Hiroshi Sakayori (ISCAS (5), 2005)

A Practical Analog BIST Cooperated with an LSI Tester. - Takanori Komuro; Naoto Hayasaka; Haruo Kobayashi 001; Hiroshi Sakayori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)