An MPEG-2 encoder architecture based on a single-chip dedicated LSI with a control MPU. - Yasushi Ooi; Osamu Ohnishi; Yutaka Yokoyama; Yoichi Katayama; Masayuki Mizuno; Masakazu Yamashina; Hideo Takano; Naoya Hayashi; Ichiro Tamitani (ICASSP, 1997)

A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking. - Masayuki Mizuno; Yasushi Ooi; Naoya Hayashi; Junichi Goto; Masatoshi Hozumi; Koichiro Furuta; Atsufumi Shibayama; Yoetsu Nakazawa; Osamu Ohnishi; Shu-Yu Zhu; Yutaka Yokoyama; Yoichi Katayama; et al. (IEEE J. Solid State Circuits, 1997)

Scaffolding for Self-overcoming of Impasse by Using Problem Simplification. - Naoya Hayashi; Tomoya Shinohara; Sho Yamamoto; Yusuke Hayashi; Tomoya Horiguchi; Tsukasa Hirashima (ICCE, 2014)

Similarity and characterization of structural and functional neural connections within species under isoflurane anesthesia in the common marmoset. - Daisuke Yoshimaru; Tomokazu Tsurugizawa; Junichi Hata; Kanako Muta; Takuto Marusaki; Naoya Hayashi; Shuhei Shibukawa; Kei Hagiya; Hideyuki Okano; Hirotaka James Okano (NeuroImage, 2024)

Preventing Project Risks by Detecting Communication Discrepancies Using Concept Map Recomposition Method. - Naoya Hayashi; Kodai Watanabe; Yusuke Hayashi; Tsukasa Hirashima (HCI (8), 2025)