A 40-Mpixel/s bit block transfer graphics processor. - Masahiko Sumi; Shigeru Tanaka; Naoyuki Kai; Yuichi Miyazawa; Masato Nagamatsu; Tsutomu Minagawa; Ichiro Nagashima; Tsuneo Hamai; Junji Mori; Tatsuo Noguchi (IEEE J. Solid State Circuits, 1989)