Using split event sets to form and schedule event combinations in discrete event simulation. - Naraig Manjikian; Wayne M. Loucks (Annual Simulation Symposium, 1992)

High performance parallel logic simulations on a network of workstations. - Naraig Manjikian; Wayne M. Loucks (PADS, 1993)

Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools. - Stephen Brown 003; Naraig Manjikian; Zvonko G. Vranesic; S. Caranci; A. Grbic; R. Grindley; M. Gusat; K. Loveless; Zeljko Zilic; Sinisa Srbljic (DAC, 1996)

Scheduling of Wavefront Parallelism on Scalable Shared-memory Multiprocessors. - Naraig Manjikian; Tarek S. Abdelrahman (ICPP, Vol. 3, 1996)

Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors. - Naraig Manjikian (ICPP, 1997)

Fusion of Loops for Parallelism and Locality. - Naraig Manjikian; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 1997)

Design and Implementation of the NUMAchine Multiprocessor. - A. Grbic; Stephen Brown 003; S. Caranci; R. Grindley; M. Gusat; Guy G. Lemieux; K. Loveless; Naraig Manjikian; Sinisa Srbljic; Michael Stumm; Zvonko G. Vranesic; Zeljko Zilic (DAC, 1998)

Locality Enhancement for Large-Scale Shared-Memory Multiprocessors. - Tarek S. Abdelrahman; Naraig Manjikian; Gary Liu; Sudarsan Tandri (LCR, 1998)

A Vector Multiprocessor for Real-Time Multi-User Detection in Spread-Spectrum Communication. - Naraig Manjikian (ASAP, 2000)

The NUMAchine Multiprocessor. - R. Grindley; Tarek S. Abdelrahman; Stephen Brown 003; S. Caranci; D. DeVries; Benjamin Gamsa; A. Grbic; M. Gusat; R. Ho; Orran Krieger; Guy G. Lemieux; K. Loveless; et al. (ICPP, 2000)

Enhancements and applications of the SimpleScalar simulator for undergraduate and graduate computer architecture education. - Naraig Manjikian (WCAE, 2000)

In-lecture hardware demonstrations with a logic analyzer to illustrate pipelined execution and cache/memory behavior. - Naraig Manjikian (WCAE, 2000)

Optimizing software performance for IP frame reassembly in an integrated architecture. - Peter M. Ewert; Naraig Manjikian (Workshop on Software and Performance, 2000)

Parallel simulation of multiprocessor execution: implementation and results for simplescalar. - Naraig Manjikian (ISPASS, 2001)

Hardware/software tradeoffs for IP-over-ATM frame reassembly in an integrated architecture. - Peter M. Ewert; Naraig Manjikian (Comput. Commun., 2001)

Multiprocessor enhancements of the SimpleScalar tool set. - Naraig Manjikian (SIGARCH Comput. Archit. News, 2001)

More enhancements of the simplescalar tool set. - Naraig Manjikian (SIGARCH Comput. Archit. News, 2001)

Exploiting Wavefront Parallelism on Large-Scale Shared-Memory Multiprocessors. - Naraig Manjikian; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 2001)

Simulation of an Integrated Architecture for IP-over-ATM Frame Processing. - Peter M. Ewert; Naraig Manjikian (Simul., 2002)

Architecture and Implementation of Chip Multiprocessors: Custom Logic Components and Software for Rapid Prototyping. - Naraig Manjikian; Huang Jin; James Reed; Nathan Cordeiro (ICPP, 2004)

Enhancements and Applications of a Versatile Software Tool for High-Level Specification of Single-Chip Systems. - Naraig Manjikian; Cindy Mark; Mohanarajah Sinnathamby; James Reed; Huang Jin (CCECE, 2006)

Enhanced Architectural Support for Variable-Length Decoding. - Mohanarajah Sinnathamby; Subramania Sudharsanan; Naraig Manjikian (ICME, 2006)

Performance optimization and parallelization of turbo decoding for software-defined radio. - Jonathan Roth; Naraig Manjikian; Subramania Sudharsanan (CCECE, 2009)

Reliability- and process variation-aware placement for FPGAs. - Assem A. M. Bsoul; Naraig Manjikian; Li Shang (DATE, 2010)

Analysis and parallelization of JPEG-2000 reference software. - Bo Fan; Naraig Manjikian (CCECE, 2011)

Controller design for matrix multiplication on FPGAs. - Ahmad Khayyat; Naraig Manjikian (CCECE, 2011)

Performance optimization of a data transfer controller for parallel matrix multiplication in FPGAS. - Ahmad Khayyat; Naraig Manjikian (CCECE, 2012)

An FPGA implementation for a high-speed optical link with a PCIe interface. - Edin Kadric; Naraig Manjikian; Zeljko Zilic (SoCC, 2012)

A graphical software tool with integer linear programming for microcontroller input/output interface selection feasibility. - Naraig Manjikian; Alexander Ferdynus; Laszlo Katona (CCECE, 2013)

Implementation and performance assessment of Linux device drivers for the coldfire MCF54418 microcontroller. - Naraig Manjikian; Laszlo Katona; Alexander Ferdynus; Simon V. Chamlian; Pavel Katkov (CCECE, 2013)

A hardware test platform in field-programmable logic for parallelized digital signal processing. - Tayler Sokalski; Naraig Manjikian (CCECE, 2013)

Automatic generation of parallelized FFT logic for implementation in FPGA chips. - Tayler Sokalski; Naraig Manjikian (NEWCAS, 2014)

Dynamic RAM-based programs and tasks in the freescale MQX operating system. - Naraig Manjikian (CCECE, 2015)

Retargeting and enhancing a compact multitasking kernel for the Altera Nios II processor. - Naraig Manjikian (CCECE, 2016)

A study of maximum frequency in FPGA chips using mesh and toroid circuit topologies. - Naraig Manjikian (CCECE, 2017)

Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. - Shervin Vakili; J. M. Pierre Langlois; Yvon Savaria; Naraig Manjikian (IET Commun., 2018)