Parallel Composition of Lockstep Synchronous Processes for Hardware Validation: Divide-and-Conquer Composition. - Ganesh Gopalakrishnan; Narayana Mani; Venkatesh Akella (Automatic Verification Methods for Finite State Systems, 1989)

HOP: A process model for synchronous hardware; semantics and experiments in process composition. - Ganesh Gopalakrishnan; Richard M. Fujimoto; Venkatesh Akella; Narayana Mani (Integr., 1989)

An Efficient Critical Race-Free State Assignment Technique for Asynchronous Finite State Machines. - Tam Anh Chu; Narayana Mani; Clement K. C. Leung (DAC, 1993)

A new state assignment technique for asynchronous finite state machines. - Tam Anh Chu; Narayana Mani; Clement K. C. Leung (Great Lakes Symposium on VLSI, 1993)