Voltage Bootstrapped Schmitt Trigger based Radiation Hardened Latch Design for Reliable Circuits. - Neha Gupta; Nikhil Agrawal; Narendra Singh Dhakad; Ambika Prasad Shah; Santosh Kumar Vishvakarma; Patrick Girard 001 (ACM Great Lakes Symposium on VLSI, 2021)

BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator. - Harsh Chhajed; Gopal Raut; Narendra Singh Dhakad; Sudheer Vishwakarma; Santosh Kumar Vishvakarma (Circuits Syst. Signal Process., 2022)

Data multiplexed and hardware reused architecture for deep neural network accelerator. - Gopal Raut; Anton Biasizzo; Narendra Singh Dhakad; Neha Gupta; Gregor Papa; Santosh Kumar Vishvakarma (Neurocomputing, 2022)

A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators. - Sudheer Vishwakarma; Gopal Raut; Narendra Singh Dhakad; Santosh Kumar Vishvakarma; Dhruva Ghai (IFIPIoT (1), 2023)

Configurable Multi-Port Memory Architecture for High-Speed Data Communication. - Narendra Singh Dhakad; Santosh Kumar Vishvakarma (CoRR, 2024)

SHA-CNN: Scalable Hierarchical Aware Convolutional Neural Network for Edge AI. - Narendra Singh Dhakad; Yuvnish Malhotra; Santosh Kumar Vishvakarma; Kaushik Roy (CoRR, 2024)

In-Memory Computing with 6T SRAM for Multi-operator Logic Design. - Narendra Singh Dhakad; Eshika Chittora; Gopal Raut; Vishal Sharma 004; Santosh Kumar Vishvakarma (Circuits Syst. Signal Process., 2024)

Configurable Multiport Memory Architecture for High-Speed Data Communication. - Narendra Singh Dhakad; Santosh Kumar Vishvakarma (IEEE Embed. Syst. Lett., 2025)