The Representation of Switching Networks in Queueing Models of Parallel Systems. - Peter G. Harrison; Naresh M. Patel (Performance, 1987)

On Hot-Spot; Contention in Interconnection Networks. - Naresh M. Patel; Peter G. Harrison (SIGMETRICS, 1988)

Models of circuit-switched interconnection networks. - Naresh M. Patel (1989)

The Representation of Multistage Interconnection Networks in Queuing Models of Parallel Systems - Peter G. Harrison; Naresh M. Patel (J. ACM, 1990)

Performance modelling of communication networks and computer architectures. - Peter G. Harrison; Naresh M. Patel (Addison-Wesley, 1993)

Reliability modelling using G-queues. - Peter G. Harrison; Naresh M. Patel; Edwige Pitel (Eur. J. Oper. Res., 2000)

Response time distribution of flash memory accesses. - Peter G. Harrison; Naresh M. Patel; Soraya Zertal (Perform. Evaluation, 2010)

Performance implications of flash and storage class memories. - Naresh M. Patel (SIGMETRICS, 2012)

Storage workload modelling by hidden Markov models: Application to Flash memory. - Peter G. Harrison; S. K. Harrison; Naresh M. Patel; Soraya Zertal (Perform. Evaluation, 2012)

Half-Latency Rule for Finding the Knee of the Latency Curve. - Naresh M. Patel (SIGMETRICS Perform. Evaluation Rev., 2015)

Energy-Performance Trade-Offs via the EP Queue. - Peter G. Harrison; Naresh M. Patel; William J. Knottenbelt (ACM Trans. Model. Perform. Evaluation Comput. Syst., 2016)

Optimizing Energy-Performance Trade-Offs in Solar-Powered Edge Devices. - Peter G. Harrison; Naresh M. Patel (ICPE, 2018)

Managing Response Time Tails by Sharding. - Peter G. Harrison; Naresh M. Patel; Juan F. Pérez; Zhan Qiu (ACM Trans. Model. Perform. Evaluation Comput. Syst., 2019)