ECO: An Empirical-Based Compilation and Optimization System. - Nastaran Baradaran; Jacqueline Chame; Chun Chen 002; Pedro C. Diniz; Mary W. Hall; Yoon-Ju Lee; Bing Liu 015; Robert F. Lucas (IPDPS, 2003)

Data Reuse in Configurable Architectures with RAM Blocks: Extended Abstract. - Nastaran Baradaran; Joonseok Park; Pedro C. Diniz (FPL, 2004)

Compiler reuse analysis for the mapping of data in FPGAs with RAM blocks. - Nastaran Baradaran; Joonseok Park; Pedro C. Diniz (FPT, 2004)

Extending the Applicability of Scalar Replacement to Multiple Induction Variables. - Nastaran Baradaran; Pedro C. Diniz; Joonseok Park (LCPC, 2004)

A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures. - Nastaran Baradaran; Pedro C. Diniz (DATE, 2005)

Compiler-Directed Design Space Exploration for Caching and Prefetching Data in High-Level Synthesis. - Nastaran Baradaran; Pedro C. Diniz (FPT, 2005)

Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures. - Nastaran Baradaran; Pedro C. Diniz (FPL, 2006)

Exploiting parallelism in configurable architectures through custom array mapping. - Nastaran Baradaran; Pedro C. Diniz (IET Comput. Digit. Tech., 2007)

A compiler approach to managing storage and memory bandwidth in configurable architectures. - Nastaran Baradaran; Pedro C. Diniz (ACM Trans. Design Autom. Electr. Syst., 2008)