Simultaneous Switching Noise Considerations in the Design of a High Speed, Multiported TLB of a Server-Class Microprocessor. - Nathan Kalyanasundharam; Nital Patwa (ICCD, 1999)

Blade computing with the AMD Opteron™ processor ("magny-cours"). - Pat Conway; Nathan Kalyanasundharam; Gregg Donley; Kevin Lepak; Bill Hughes (Hot Chips Symposium, 2009)

Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor. - Pat Conway; Nathan Kalyanasundharam; Gregg Donley; Kevin Lepak; Bill Hughes (IEEE Micro, 2010)

"Zeppelin": An SoC for Multichip Architectures. - Thomas Burd; Noah Beck; Sean White; Milam Paraschou; Nathan Kalyanasundharam; Gregg Donley; Alan Smith 003; Larry Hewitt; Samuel Naffziger (IEEE J. Solid State Circuits, 2019)

Realizing the AMD Exascale Heterogeneous Processor Vision : Industry Product. - Alan Smith 003; Gabriel H. Loh; Michael J. Schulte; Mike Ignatowski; Samuel Naffziger; Mike Mantor; Nathan Kalyanasundharam; Vamsi Alla; Nicholas Malaya; Joseph L. Greathouse; Eric Chapman; Raja Swaminathan (ISCA, 2024)

Interconnect Design for Heterogeneous Integration of Chiplets in the AMD Instinct MI300X Accelerator. - Alan Smith 003; Gabriel H. Loh; Samuel Naffziger; John J. Wuu; Nathan Kalyanasundharam; Eric Chapman; Raja Swaminathan; Tyrone Huang; Wonjun Jung; Alexander Kaganov; Hugh McIntyre; Ramon Mangaser (IEEE Micro, 2025)