Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions. - Hiroshi Saito; Euiseok Kim; Nattha Sretasereekul; Masashi Imai; Hiroshi Nakamura; Takashi Nanya (ASYNC, 2003)

Control signal sharing of asynchronous circuits using datapath delay information. - Hiroshi Saito; Euiseok Kim; Masashi Imai; Nattha Sretasereekul; Hiroshi Nakamura; Takashi Nanya (ISCAS (5), 2003)

A zero-time-overhead asynchronous four-phase controller. - Nattha Sretasereekul; Hiroshi Saito; Masashi Imai; Euiseok Kim; Metehan Özcan; K. Thongnoo; Hiroshi Nakamura; Takashi Nanya (ISCAS (5), 2003)

Eliminating Isochronic-Fork Constraints in Quasi-Delay-Insensitive Circuits. - Nattha Sretasereekul; Takashi Nanya (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Synthesis of Serial Local Clock Controllers for Asynchronous Circuit Design. - Nattha Sretasereekul; Hiroshi Saito; Euiseok Kim; Metehan Özcan; Masashi Imai; Hiroshi Nakamura; Takashi Nanya (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)