A Clock Synchronizer for Repeaterless Low Swing On-Chip Links. - Naveen Kadayinti; Maryam Shojaei Baghini; Dinesh Kumar Sharma (CoRR, 2015)

Testable Design of Repeaterless Low Swing On-Chip Interconnect. - Naveen Kadayinti; Dinesh Kumar Sharma (CoRR, 2015)

Settling Time of Mesochronous Clock Retiming Circuits for Low Swing Interconnects. - Naveen Kadayinti; Amitalok J. Budkuley; Dinesh Kumar Sharma (CoRR, 2016)

Settling time of mesochronous clock re-timing circuits in the presence of timing jitter. - Naveen Kadayinti; Amitalok J. Budkuley; Dinesh Kumar Sharma (ISCAS, 2017)

A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects. - Naveen Kadayinti; Maryam Shojaei Baghini; Dinesh Kumar Sharma (VLSID, 2017)

Clock Skew Measurement Using an All-Digital Sigma-Delta Time to Digital Converter. - Mahadev Govind Shirwaikar; Naveen Kadayinti; Dinesh Kumar Sharma (VLSID, 2017)

Sense amplifier comparator with offset correction for decision feedback equalization based receivers. - Naveen Kadayinti; Dinesh Kumar Sharma (Microelectron. J., 2017)

Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects. - Naveen Kadayinti; Maryam Shojaei Baghini; Dinesh Kumar Sharma (Microelectron. J., 2018)

A True Time Delay Element using Cascaded Variable Bandwidth All Pass Filters. - Mayur S. Marinaik; Ganga K. Maheshwarappa; Naveen Kadayinti (ISCAS, 2022)

Mismatch Tolerant Negative Conductance Load Tuning for High Gain OTAs. - Mayur S. Marinaik; Naveen Kadayinti (APCCAS, 2023)

TRNG Based on Multiple Entropy Sources Using CTDSM. - Apurv Pandey; Naveen Kadayinti (APCCAS, 2024)