Design of test pattern generator (TPG) by an optimized low power design for testability (DFT) for scan BIST circuits using transmission gates. - G. Naveen Balaji; S. Chenthur Pandian (Clust. Comput., 2019)

Arbitrary Alloy Semiconductor Material Based DG MOSFET for High-Frequency Industrial and Hybrid Consumer Applications. - Naveenbalaji Gowthaman; Viranjay M. Srivastava (AFRICON, 2021)

Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications. - Naveenbalaji Gowthaman; Viranjay M. Srivastava (IEEE Access, 2021)

Parametric Analysis of CSDG MOSFET With La2O3 Gate Oxide: Based on Electrical Field Estimation. - Naveenbalaji Gowthaman; Viranjay M. Srivastava (IEEE Access, 2021)

Design and Analysis of InP/InAs/AlGaAs Based Cylindrical Surrounding Double-Gate (CSDG) MOSFETs With La2O3 for 5-nm Technology. - Pattunnarajam Paramasivam; Naveenbalaji Gowthaman; Viranjay M. Srivastava (IEEE Access, 2021)

Design of Cylindrical Surrounding Double-Gate MOSFET With Fabrication Steps Using a Layer-by-Layer Approach. - Naveenbalaji Gowthaman; Viranjay M. Srivastava (IEEE Access, 2022)