Design and implementation of a new Persian digits OCR algorithm on FPGA chips. - Navid Toosizadeh; Mohammad Eshghi (EUSIPCO, 2005)

Using edge-triggering in the asynchronous synthesis of write-after-read operations. - Navid Toosizadeh; Safwat G. Zaky (ACSD, 2008)

VariPipe: Low-overhead variable-clock synchronous pipelines. - Navid Toosizadeh; Safwat G. Zaky; Jianwen Zhu (ICCD, 2009)

Application of Concurrency in the Asynchronous Design of Write-after-read Operations. - Navid Toosizadeh; Safwat G. Zaky (Fundam. Informaticae, 2009)

Using variable clocking to reduce leakage in synchronous circuits. - Navid Toosizadeh; Safwat G. Zaky; Jianwen Zhu (ICCD, 2010)