Low power circuit techniques for optimizing power in high speed SRAMs. - Navneet Kaur Saini; Aniruddha Gupta; Ravija Prashar; Parul Gupta (ICACCI, 2016)

Drain side pocket-based Germanium nanotube tunnel FET for low power complementary ternary inverter. - Navneet Kaur Saini; Nitish Kumar; Raghvendra Sahai Saxena; Anuj Dhawan; M. Jagadesh Kumar (Microelectron. J., 2025)