An efficient combinationality check technique for the synthesis of cyclic combinational circuits. - Vineet Agarwal; Navneeth Kankani; Ravishankar Rao; Sarvesh Bhardwaj; Janet Meiling Wang (ASP-DAC, 2005)

A probabilistic analysis of pipelined global interconnect under process variations. - Navneeth Kankani; Vineet Agarwal; Janet Meiling Wang (ASP-DAC, 2006)