Enabling mixed-precision quantized neural networks in extreme-edge devices. - Nazareno Bruschi; Angelo Garofalo; Francesco Conti 001; Giuseppe Tagliavini; Davide Rossi (CF, 2020)

GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. - Nazareno Bruschi; Germain Haugou; Giuseppe Tagliavini; Francesco Conti 001; Luca Benini; Davide Rossi (ICCD, 2021)

DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs. - Alessio Burrello; Angelo Garofalo; Nazareno Bruschi; Giuseppe Tagliavini; Davide Rossi; Francesco Conti 001 (IEEE Trans. Computers, 2021)

Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference. - Nazareno Bruschi; Giuseppe Tagliavini; Francesco Conti 001; Sergi Abadal; Albert Cabellos-Aparicio; Eduard Alarcón; Geethan Karunaratne; Irem Boybat; Luca Benini; Davide Rossi (AICAS, 2022)

PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. - Vikram Jain; Matheus A. Cavalcante; Nazareno Bruschi; Michael Rogenmoser; Thomas Benz; Andreas Kurth; Davide Rossi; Luca Benini; Marian Verhelst (DAC, 2023)

End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. - Nazareno Bruschi; Giuseppe Tagliavini; Angelo Garofalo; Francesco Conti 001; Irem Boybat; Luca Benini; Davide Rossi (DATE, 2023)

A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. - Alessandro Nadalini; Georg Rutishauser; Alessio Burrello; Nazareno Bruschi; Angelo Garofalo; Luca Benini; Francesco Conti 001; Davide Rossi (ISVLSI, 2023)

11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. - Pascal Alexander Hager; Bert Moons; Stefan Cosemans; Ioannis A. Papistas; Bram Rooseleer; Jeroen Van Loon; Roel Uytterhoeven; Florian Zaruba; Spyridoula Koumousi; Milos Stanisavljevic; Stefan Mach; Sebastiaan Mutsaards; et al. (ISSCC, 2024)

Parallel computing architectures and techniques for heterogeneous acceleration of AI algorithms. - Nazareno Bruschi (2024)