An intelligent tutoring system for CMOS digital design. - Neeraj Kaul; C. J. Kee; Gautam Biswas (IEA/AIE (2), 1989)

Multi-level qualitative reasoning applied to CMOS digital circuits. - Neeraj Kaul; Gautam Biswas; Bharat L. Bhuva (Artif. Intell. Eng., 1992)

Performance Driven BIST Technique for Random Logic. - Charles Njinda; Neeraj Kaul (ITC, 1995)

Design planning trends and challenges. - Neeraj Kaul (ISPD, 2010)