Development of a Test Rig for the study of Musculoskeletal Actuation of Human finger. - Sahil Kalra; Anand Vaz; Neeraj Mishra (AIR, 2013)

Pixel-wise Background Segmentation with Moving Camera. - Neeraj Mishra; Manas Kamal Bhuyan; T. Malathi; Yuji Iwahori; Robert J. Woodham (PReMI, 2013)

Embedded Reconfigurable Augmented DC-DC Boost Converter for Fast Transient Recovery. - Neeraj Mishra; Niraj K. Jha; Santanu Kapat; Amit Patra (VLSI Design, 2013)

Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies. - Arvind Kumar Sharma; Neeraj Mishra; Naushad Alam; Sudeb Dasgupta; Anand Bulusu (VDAT, 2015)

Conversion of polypropylene to two-dimensional graphene, one-dimensional carbon nano tubes and zero-dimensional C-dots, all exhibiting typical sp2-hexagonal carbon rings. - Madhuri Sharon; Neeraj Mishra; Bhushan Patil; Ashmi Mewada; Raju Gurung; Maheshwar Sharon (IET Circuits Devices Syst., 2015)

Grading of colorectal cancer using histology images. - Namita Sengar; Neeraj Mishra; Malay Kishore Dutta; Jiri Prinosil; Radim Burget (TSP, 2016)

MOS Varactor RO Architectures in Near Threshold Regime Using Forward Body Biasing Techniques. - Lalit Dani; Neeraj Mishra; Bulusu Anand (VLSID, 2019)

Design and Realization of High-Speed Low-Noise Multi-Loop Skew-Based ROs Optimized for Even/Odd Multi-Phase Signals. - Neeraj Mishra; Lalit Dani; Kunal Sanvaniya; Sudeb Dasgupta; Sudipto Chakraborty; Anand Bulusu (IEEE Trans. Circuits Syst., 2020)

An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures. - Lalit Mohan Dani; Neeraj Mishra; Anand Bulusu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Phase Noise Analysis of Separately Driven Ring Oscillators. - Neeraj Mishra; Anchit Proch; Lomash Chandra Acharya; Jeffrey Prinzie; Sudipto Chakraborty; Rajiv V. Joshi; Sudeb Dasgupta; Anand Bulusu (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Variation Aware Jitter Estimation Methodology in ROs Considering Over/Undershoots in NTV Regime. - Lalit Mohan Dani; Neeraj Mishra; Bulusu Anand (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Delay Modulation in Separately Driven Delay Cells Utilized for the Generation of High-Performance Multiphase Signals Using ROs. - Neeraj Mishra; Lalit Mohan Dani; Sudipto Chakraborty; Rajiv V. Joshi; Anand Bulusu (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications. - Ravi; Lomash Chandra Acharya; Mahipal Dargupally; Neha Gupta; Neeraj Mishra; Lalit Mohan Dani; Nilotpal Sarma; Devesh Dwivedi; Sudeb Dasgupta; Anand Bulusu (APCCAS, 2023)

Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure. - Lomash Chandra Acharya; Anubhav Kumar; Khoirom Johnson Singh; Neha Gupta; Nayakanti Sai Shabarish; Neeraj Mishra; Mahipal Dargupally; Arvind Kumar Sharma; Venkatraman Ramakrishnan; Ajoy Mandal; Sudeb Dasgupta; Anand Bulusu (SMACD, 2023)

Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort. - Lomash Chandra Acharya; Arvind Kumar Sharma; Neeraj Mishra; Khoirom Johnson Singh; Mahipal Dargupally; Nayakanti Sai Shabarish; Ajoy Mandal; Venkatraman Ramakrishnan; Sudeb Dasgupta; Anand Bulusu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Generalized Edge Propagation and Multi-Band Frequency Switching Mechanism for MSSROs. - Neeraj Mishra; Anchit Proch; Lomash Chandra Acharya; Sudipto Chakraborty; Anand Bulusu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Switching Activity Factor-Based ECSM Characterization (SAFE): A Novel Technique for Aging-Aware Static Timing Analysis. - Lomash Chandra Acharya; Arvind K. Sharma; Neeraj Mishra; Khoirom Johnson Singh; Mahipal Dargupally; Neha Gupta; Nayakanti Sai Shabarish; Ajoy Mandal; Venkatraman Ramakrishnan; Sudeb Dasgupta; Anand Bulusu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)