An FPGA implementation of an elliptic curve processor GF(2m). - Nele Mentens; Siddika Berna Örs; Bart Preneel (ACM Great Lakes Symposium on VLSI, 2004)

An FPGA Implementation of a Montgomery Multiplier Over GF(2^m). - Nele Mentens; Siddika Berna Örs; Bart Preneel; Joos Vandewalle (Comput. Artif. Intell., 2004)

Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2n). - Lejla Batina; Nele Mentens; Bart Preneel; Ingrid Verbauwhede (ASAP, 2005)

A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box. - Nele Mentens; Lejla Batina; Bart Preneel; Ingrid Verbauwhede (CT-RSA, 2005)

Side-Channel Issues for Designing Secure Hardware Implementations. - Lejla Batina; Nele Mentens; Ingrid Verbauwhede (IOLTS, 2005)

Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking. - Nele Mentens; Lejla Batina; Bart Preneel; Ingrid Verbauwhede (ARC, 2006)

Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems. - Kazuo Sakiyama; Nele Mentens; Lejla Batina; Bart Preneel; Ingrid Verbauwhede (ARC, 2006)

Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks. - Lejla Batina; Nele Mentens; Kazuo Sakiyama; Bart Preneel; Ingrid Verbauwhede (ESAS, 2006)

Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor. - Nele Mentens; Kazuo Sakiyama; Lejla Batina; Ingrid Verbauwhede; Bart Preneel (FPL, 2006)

Flexible hardware architectures for curve-based cryptography. - Lejla Batina; Nele Mentens; Bart Preneel; Ingrid Verbauwhede (ISCAS, 2006)

An Elliptic Curve Processor Suitable For RFID-Tags. - Lejla Batina; Jorge Guajardo; Tim Kerins; Nele Mentens; Pim Tuyls; Ingrid Verbauwhede (IACR Cryptol. ePrint Arch., 2006)

Efficient pipelining for modular multiplication architectures in prime fields. - Nele Mentens; Kazuo Sakiyama; Bart Preneel; Ingrid Verbauwhede (ACM Great Lakes Symposium on VLSI, 2007)

Public-Key Cryptography on the Top of a Needle. - Lejla Batina; Nele Mentens; Kazuo Sakiyama; Bart Preneel; Ingrid Verbauwhede (ISCAS, 2007)

Public-Key Cryptography for RFID-Tags. - Lejla Batina; Jorge Guajardo; Tim Kerins; Nele Mentens; Pim Tuyls; Ingrid Verbauwhede (PerCom Workshops, 2007)

A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications. - Nele Mentens; Kazuo Sakiyama; Lejla Batina; Bart Preneel; Ingrid Verbauwhede (ICSAMOS, 2007)

Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration. - Nele Mentens; Benedikt Gierlichs; Ingrid Verbauwhede (CHES, 2008)

Secure FPGA technologies and techniques. - An Braeken; Serge Kubera; Frederik Trouillez; Abdellah Touhafi; Nele Mentens; Jo Vliegen (FPL, 2009)

The Certicom Challenges ECC2-X. - Daniel V. Bailey; Brian Baldwin; Lejla Batina; Daniel J. Bernstein; Peter Birkner; Joppe W. Bos; Gauthier Van Damme; Giacomo de Meulenaer; Junfeng Fan; Tim Güneysu; Frank K. Gürkaynak; Thorsten Kleinjung; et al. (IACR Cryptol. ePrint Arch., 2009)

Breaking ECC2K-130. - Daniel V. Bailey; Lejla Batina; Daniel J. Bernstein; Peter Birkner; Joppe W. Bos; Hsieh-Chung Chen; Chen-Mou Cheng; Gauthier Van Damme; Giacomo de Meulenaer; Luis J. Dominguez Perez; Junfeng Fan; Tim Güneysu; et al. (IACR Cryptol. ePrint Arch., 2009)

A compact FPGA-based architecture for elliptic curve cryptography over prime fields. - Jo Vliegen; Nele Mentens; Jan Genoe; An Braeken; Serge Kubera; Abdellah Touhafi; Ingrid Verbauwhede (ASAP, 2010)

Secure remote reconfiguration of FPGAs. - Nele Mentens; Jo Vliegen; An Braeken; Abdellah Touhafi; Karel Wouters; Ingrid Verbauwhede (Dynamically Reconfigurable Architectures, 2010)

Side-channel evaluation of FPGA implementations of binary Edwards curves. - Lejla Batina; Jip Hogenboom; Nele Mentens; Joren Moelans; Jo Vliegen (ICECS, 2010)

Secure remote reconfiguration of an FPGA-based embedded system. - An Braeken; Jan Genoe; Serge Kubera; Nele Mentens; Abdellah Touhafi; Ingrid Verbauwhede; Yannick Verbelen; Jo Vliegen; Karel Wouters (ReCoSoC, 2011)

Design space exploration for automatically generated cryptographic hardware using functional languages. - Davy Wolfs; Kris Aerts; Nele Mentens (FPL, 2012)

Remote FPGA design through eDiViDe - European Digital Virtual Design Lab. - Jochen Vandorpe; Jo Vliegen; Ruben Smeets; Nele Mentens; Milos Drutarovský; Michal Varchola; Kerstin Lemke-Rust; Paul Plöger; Peter Samarin; Dirk Koch; Yngve Hafting; Jim Tørresen (FPL, 2013)

A single-chip solution for the secure remote configuration of FPGAs using bitstream compression. - Jo Vliegen; Nele Mentens; Ingrid Verbauwhede (ReConFig, 2013)

Dietary Recommendations for Lightweight Block Ciphers: Power, Energy and Area Analysis of Recently Developed Architectures. - Lejla Batina; Amitabh Das; Baris Ege; Elif Bilge Kavun; Nele Mentens; Christof Paar; Ingrid Verbauwhede; Tolga Yalçin (IACR Cryptol. ePrint Arch., 2013)

Compact Hardware Implementation of Ring-LWE Cryptosystems. - Sujoy Sinha Roy; Frederik Vercauteren; Nele Mentens; Donald Donglong Chen; Ingrid Verbauwhede (IACR Cryptol. ePrint Arch., 2013)

An Elliptic Curve Cryptographic Processor Using Edwards Curves and the Number Theoretic Transform. - Nele Mentens; Lejla Batina; Selçuk Baktir (BalkanCryptSec, 2014)

Compact Ring-LWE Cryptoprocessor. - Sujoy Sinha Roy; Frederik Vercauteren; Nele Mentens; Donald Donglong Chen; Ingrid Verbauwhede (CHES, 2014)

S-box pipelining using genetic algorithms for high-throughput AES implementations: How fast can we go? - Lejla Batina; Domagoj Jakobovic; Nele Mentens; Stjepan Picek; Antonio de la Piedra; Dominik Sisejkovic (IACR Cryptol. ePrint Arch., 2014)

DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications. - Nele Mentens; Jochen Vandorpe; Jo Vliegen; An Braeken; Bruno da Silva 001; Abdellah Touhafi; Alois Kern; Stephan Knappmann; Jens Rettkowski; Muhammed Al Kadi; Diana Göhringer; Michael Hübner 001 (ARC, 2015)

Study on impact of adding security in a 6LoWPAN based network. - Matthias Carlier; Kris Steenhaut; An Braeken; Ruben Smeets; Nele Mentens; Kris Aerts (CNS, 2015)

Embedded HW/SW platform for on-the-fly testing of true random number generators. - Bohan Yang 001; Vladimir Rozic; Nele Mentens; Wim Dehaene; Ingrid Verbauwhede (DATE, 2015)

Challenges in designing trustworthy cryptographic co-processors. - Ricardo Chaves; Giorgio Di Natale; Lejla Batina; Shivam Bhasin; Baris Ege; Apostolos P. Fournaris; Nele Mentens; Stjepan Picek; Francesco Regazzoni 001; Vladimir Rozic; Nicolas Sklavos 001; Bohan Yang 001 (ISCAS, 2015)

On-the-fly tests for non-ideal true random number generators. - Bohan Yang 001; Vladimir Rozic; Nele Mentens; Ingrid Verbauwhede (ISCAS, 2015)

Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs. - Jo Vliegen; Nele Mentens; Dirk Koch; Dries Schellekens; Ingrid Verbauwhede (J. Cryptogr. Eng., 2015)

High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems. - Donald Donglong Chen; Nele Mentens; Frederik Vercauteren; Sujoy Sinha Roy; Ray C. C. Cheung; Derek Chi-Wai Pao; Ingrid Verbauwhede (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Secure, Remote, Dynamic Reconfiguration of FPGAs. - Jo Vliegen; Nele Mentens; Ingrid Verbauwhede (ACM Trans. Reconfigurable Technol. Syst., 2015)

A Fast and Compact FPGA Implementation of Elliptic Curve Cryptography Using Lambda Coordinates. - Burak Gövem; Kimmo Järvinen 001; Kris Aerts; Ingrid Verbauwhede; Nele Mentens (AFRICACRYPT, 2016)

Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware. - Stjepan Picek; Dominik Sisejkovic; Domagoj Jakobovic; Lejla Batina; Bohan Yang 001; Danilo Sijacic; Nele Mentens (AFRICACRYPT, 2016)

PRNGs for Masking Applications and Their Mapping to Evolvable Hardware. - Stjepan Picek; Bohan Yang 001; Vladimir Rozic; Jo Vliegen; Jori Winderickx; Thomas De Cnudde; Nele Mentens (CARDIS, 2016)

TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware. - Bohan Yang 001; Vladimir Rozic; Nele Mentens; Wim Dehaene; Ingrid Verbauwhede (DATE, 2016)

Evolutionary Algorithms for Finding Short Addition Chains: Going the Distance. - Stjepan Picek; Carlos A. Coello Coello; Domagoj Jakobovic; Nele Mentens (EvoCOP, 2016)

Exploring the use of shift register lookup tables for Keccak implementations on Xilinx FPGAs. - Jori Winderickx; Joan Daemen; Nele Mentens (FPL, 2016)

Evolving Cryptographic Pseudorandom Number Generators. - Stjepan Picek; Dominik Sisejkovic; Vladimir Rozic; Bohan Yang 001; Domagoj Jakobovic; Nele Mentens (PPSN, 2016)

On the Construction of Hardware-Friendly 4 times 4 and 5 times 5 S-Boxes. - Stjepan Picek; Bohan Yang 001; Vladimir Rozic; Nele Mentens (SAC, 2016)

A Search Strategy to Optimize the Affine Variant Properties of S-Boxes. - Stjepan Picek; Bohan Yang 001; Nele Mentens (WAIFI, 2016)

Low Power Montgomery Modular Multiplication on Reconfigurable Systems. - Pedro Maat C. Massolino; Lejla Batina; Ricardo Chaves; Nele Mentens (IACR Cryptol. ePrint Arch., 2016)

Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators. - Vladimir Rozic; Bohan Yang 001; Nele Mentens; Ingrid Verbauwhede (IACR Cryptol. ePrint Arch., 2016)

Guest Editorial. - Nele Mentens; Damien Sauveron; José M. Sierra; Shiuh-Jeng Wang; Isaac Woungang (IET Inf. Secur., 2016)

On-chip jitter measurement for true random number generators. - Bohan Yang 001; Vladimir Rozic; Milos Grujic; Nele Mentens; Ingrid Verbauwhede (AsianHOST, 2017)

Do we need a holistic approach for the design of secure IoT systems? - Mauro Conti; Giorgio Di Natale; Annelie Heuser; Thomas Pöppelmann; Nele Mentens (Conf. Computing Frontiers, 2017)

Design of S-boxes Defined with Cellular Automata Rules. - Stjepan Picek; Luca Mariot; Bohan Yang 001; Domagoj Jakobovic; Nele Mentens (Conf. Computing Frontiers, 2017)

Area-optimized montgomery multiplication on IGLOO 2 FPGAs. - Pedro Maat C. Massolino; Lejla Batina; Ricardo Chaves; Nele Mentens (FPL, 2017)

The Monte Carlo PUF. - Vladimir Rozic; Bohan Yang 001; Jo Vliegen; Nele Mentens; Ingrid Verbauwhede (FPL, 2017)

Side-channel analysis and machine learning: A practical perspective. - Stjepan Picek; Annelie Heuser; Alan Jovic; Simone A. Ludwig; Sylvain Guilley; Domagoj Jakobovic; Nele Mentens (IJCNN, 2017)

Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA. - Jo Vliegen; Oscar Reparaz; Nele Mentens (IVSW, 2017)

Hiding side-channel leakage through hardware randomization: A comprehensive overview. - Nele Mentens (SAMOS, 2017)

Side-channel Analysis of Lightweight Ciphers: Does Lightweight Equal Easy? - Annelie Heuser; Stjepan Picek; Sylvain Guilley; Nele Mentens (IACR Cryptol. ePrint Arch., 2017)

HeComm: End-to-end secured communication in a heterogeneous IoT environment via fog computing. - Jori Winderickx; Dave Singelée; Nele Mentens (CCNC, 2018)

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. - Zdenek Martinasek; Jan Hajny; David Smekal; Lukas Malina; Denis Matousek; Michal Kekely; Nele Mentens (ASHES@CCS, 2018)

Digital signatures and signcryption schemes on embedded devices: a trade-off between computation and storage. - Jori Winderickx; An Braeken; Dave Singelée; Roel Peeters; Thijs Vandenryt; Ronald Thoelen; Nele Mentens (CF, 2018)

Storage and computation optimization of public-key schemes on embedded devices. - Jori Winderickx; An Braeken; Nele Mentens (Cloudtech, 2018)

Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. - Niels Pirotte; Jo Vliegen; Lejla Batina; Nele Mentens (DSD, 2018)

Combining analog and digital electronics in a hands-on introductory course. - Nele Mentens; Ronald Thoelen (EWME, 2018)

A Systematic Performance Comparison of Ultra Low-Power AES S-Boxes. - Thomas Vandenabeele; Roel Uytterhoeven; Wim Dehaene; Nele Mentens (PATMOS, 2018)

Finding short and implementation-friendly addition chains with evolutionary algorithms. - Stjepan Picek; Carlos A. Coello Coello; Domagoj Jakobovic; Nele Mentens (J. Heuristics, 2018)

Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow. - Nele Mentens; Edoardo Charbon; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2018)

High-speed Side-channel-protected Encryption and Authentication in Hardware. - Nele Mentens; Vojtech Miskovský; Martin Novotný; Jo Vliegen (IACR Cryptol. ePrint Arch., 2018)

ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling. - Bohan Yang 001; Vladimir Rozic; Milos Grujic; Nele Mentens; Ingrid Verbauwhede (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018)

In Hardware We Trust: Gains and Pains of Hardware-assisted Security. - Lejla Batina; Patrick Jauernig; Nele Mentens; Ahmad-Reza Sadeghi; Emmanuel Stapf (DAC, 2019)

SACHa: Self-Attestation of Configurable Hardware. - Jo Vliegen; Md Masoom Rabbani; Mauro Conti; Nele Mentens (DATE, 2019)

Dynamic Logic Reconfiguration Based Side-Channel Protection of AES and Serpent. - Petr Socha; Jan Brejník; Stanislav Jerabek; Martin Novotný; Nele Mentens (DSD, 2019)

Communication and security trade-offs for wearable medical sensor systems in hospitals: work-in-progress. - Jori Winderickx; Pierre Bellier; Patrick Duflot; Dorothée Coppieters; Nele Mentens (EMSOFT Companion, 2019)

Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs. - Elif Bilge Kavun; Nele Mentens; Jo Vliegen; Tolga Yalçin (IACR Cryptol. ePrint Arch., 2019)

A Novel FPGA Architecture and Protocol for the Self-attestation of Configurable Hardware. - Jo Vliegen; Md Masoom Rabbani; Mauro Conti; Nele Mentens (IACR Cryptol. ePrint Arch., 2019)

SHeLA: Scalable Heterogeneous Layered Attestation. - Md Masoom Rabbani; Jo Vliegen; Jori Winderickx; Mauro Conti; Nele Mentens (IEEE Internet Things J., 2019)

Balancing elliptic curve coprocessors from bottom to top. - Niels Pirotte; Jo Vliegen; Lejla Batina; Nele Mentens (Microprocess. Microsystems, 2019)

Security on Plastics: Fake or Real? - Nele Mentens; Jan Genoe; Thomas Vandenabeele; Lynn Verschueren; Dirk Smets; Wim Dehaene; Kris Myny (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019)

Evolvable Hardware Architectures on FPGA for Side-Channel Security. - Mansoureh Labafniya; Shahram Etemadi Borujeni; Nele Mentens (ACNS Workshops, 2020)

AITIA: Embedded AI Techniques for Embedded Industrial Applications. - Marcelo Brandalero; Muhammad Ali 010; Laurens Le Jeune; Hector Gerardo Muñoz Hernandez; Mitko Veleski; Bruno da Silva 001; Jan Lemeire; Kristof Van Beeck; Abdellah Touhafi; Toon Goedemé; Nele Mentens; Diana Göhringer; et al. (COINS, 2020)

INVITED: AI Utopia or Dystopia - On Securing AI Platforms. - Ghada Dessouky; Patrick Jauernig; Nele Mentens; Ahmad-Reza Sadeghi; Emmanuel Stapf (DAC, 2020)

Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. - Ievgen Kabin; Zoya Dyka; Dan Klann; Nele Mentens; Lejla Batina; Peter Langendörfer (DSD, 2020)

Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. - Arish Sateesan; Jo Vliegen; Joan Daemen; Nele Mentens (DSD, 2020)

SHeFU: Secure Hardware-Enabled Protocol for Firmware Updates. - Md Masoom Rabbani; Jo Vliegen; Mauro Conti; Nele Mentens (ISCAS, 2020)

On the feasibility of using evolvable hardware for hardware Trojan detection and prevention. - Mansoureh Labafniya; Stjepan Picek; Shahram Etemadi Borujeni; Nele Mentens (Appl. Soft Comput., 2020)

PROOFS 2018 Editorial. - Lejla Batina; Nele Mentens (J. Cryptogr. Eng., 2020)

Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware. - Petr Socha; Jan Brejník; Josep Balasch; Martin Novotný; Nele Mentens (Microprocess. Microsystems, 2020)

Lightweight Ciphers and Their Side-Channel Resilience. - Annelie Heuser; Stjepan Picek; Sylvain Guilley; Nele Mentens (IEEE Trans. Computers, 2020)

Towards Real-Time Deep Learning-Based Network Intrusion Detection on FPGA. - Laurens Le Jeune; Toon Goedemé; Nele Mentens (ACNS Workshops, 2021)

Invited: Security Beyond Bulk Silicon: Opportunities and Challenges of Emerging Devices. - Lejla Batina; Rosario Cammarota; Nele Mentens; Ahmad-Reza Sadeghi; Johanna Sepúlveda; Shaza Zeitouni (DAC, 2021)

Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. - Thomas Claesen; Arish Sateesan; Jo Vliegen; Nele Mentens (DSD, 2021)

Trusted Configuration in Cloud FPGAs. - Shaza Zeitouni; Jo Vliegen; Tommaso Frassetto; Dirk Koch; Ahmad-Reza Sadeghi; Nele Mentens (FCCM, 2021)

AITIA: Embedded AI Techniques for Industrial Applications. - Marcelo Brandalero; Mitko Veleski; Hector Gerardo Muñoz Hernandez; Muhammad Ali 010; Laurens Le Jeune; Toon Goedemé; Nele Mentens; Jurgen Vandendriessche; Lancelot Lhoest; Bruno da Silva 001; Abdellah Touhafi; Diana Goehringer; et al. (FPL, 2021)

Speed Records in Network Flow Measurement on FPGA. - Arish Sateesan; Jo Vliegen; Simon Scherrer; Hsu-Chun Hsiao; Adrian Perrig; Nele Mentens (FPL, 2021)

ROCKY: Rotation Countermeasure for the Protection of Keys and Other Sensitive Data. - Konstantina Miteloudi; Lejla Batina; Joan Daemen; Nele Mentens (SAMOS, 2021)

RESERVE: Remote Attestation of Intermittent IoT devices. - Md Masoom Rabbani; Edlira Dushku; Jo Vliegen; An Braeken; Nicola Dragoni; Nele Mentens (SenSys, 2021)

SoK - Network Intrusion Detection on FPGA. - Laurens Le Jeune; Arish Sateesan; Md Masoom Rabbani; Toon Goedemé; Jo Vliegen; Nele Mentens (SPACE, 2021)

Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. - Simon Scherrer; Che-Yu Wu; Yu-Hsi Chiang; Benjamin Rothenberger; Daniele Enrico Asoni; Arish Sateesan; Jo Vliegen; Nele Mentens; Hsu-Chun Hsiao; Adrian Perrig (SRDS, 2021)

Evaluating the ROCKY Countermeasure for Side-Channel Leakage. - Konstantina Miteloudi; Lukasz Chmielewski; Lejla Batina; Nele Mentens (VLSI-SoC, 2021)

Machine Learning for Misuse-Based Network Intrusion Detection: Overview, Unified Evaluation and Feature Choice Comparison Framework. - Laurens Le Jeune; Toon Goedemé; Nele Mentens (IEEE Access, 2021)

Communication and Security Trade-Offs for Battery-Powered Devices: A Case Study on Wearable Medical Sensor Systems. - Jori Winderickx; Pierre Bellier; Patrick Duflot; Nele Mentens (IEEE Access, 2021)

A Scalable SIMD RISC-V based Processor with Customized Vector Extensions for CRYSTALS-Kyber. - Huimin Li 004; Nele Mentens; Stjepan Picek (IACR Cryptol. ePrint Arch., 2021)

Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology. - Arthur Beckers; Roel Uytterhoeven; Thomas Vandenabeele; Jo Vliegen; Lennert Wouters; Joan Daemen; Wim Dehaene; Benedikt Gierlichs; Nele Mentens (CF, 2022)

Feature dimensionality in CNN acceleration for high-throughput network intrusion detection. - Laurens Le Jeune; Toon Goedemé; Nele Mentens (FPL, 2022)

FOCUS: Frequency Based Detection of Covert Ultrasonic Signals. - Wouter Hellemans; Md Masoom Rabbani; Jo Vliegen; Nele Mentens (SEC, 2022)

An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security. - Arish Sateesan; Jo Vliegen; Nele Mentens (SPACE, 2022)

Maximizing the Potential of Custom RISC-V Vector Extensions for Speeding up SHA-3 Hash Functions. - Huimin Li 004; Nele Mentens; Stjepan Picek (IACR Cryptol. ePrint Arch., 2022)

In-depth energy analysis of security algorithms and protocols for the Internet of Things. - Jori Winderickx; An Braeken; Dave Singelée; Nele Mentens (J. Cryptogr. Eng., 2022)

Introduction to the Special Section on FPL 2020. - Nele Mentens; Leonel Sousa; Pedro Trancoso (ACM Trans. Reconfigurable Technol. Syst., 2022)

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications. - Arish Sateesan; Jo Vliegen; Joan Daemen; Nele Mentens (Microprocess. Microsystems, 2022)

Intelligent Security: Is "AI for Cybersecurity" a Blessing or a Curse (Dagstuhl Seminar 22412). - Nele Mentens; Stjepan Picek; Ahmad-Reza Sadeghi (Dagstuhl Reports, 2022)

Preface ASAP 2023. - João M. P. Cardoso; Alexandra Jimborean; Nele Mentens; José Gabriel F. Coutinho (ASAP, 2023)

Yes we CAN!: Towards bringing security to legacy-restricted Controller Area Networks. A review. - Wouter Hellemans; Md Masoom Rabbani; Bart Preneel; Nele Mentens (CF, 2023)

NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. - Xabier Iturbe; Nassim Abderrahmane; Jaume Abella 001; Sergi Alcaide; Eric Beyne; Henri-Pierre Charles; Christelle Charpin-Nicolle; Lars Chittka; Angélica Dávila; Arne Erdmann; Carles Estrada; Ander Fernández; et al. (DATE, 2023)

A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors. - Jens Anders; Pablo Andreu; Bernd Becker 001; Steffen Becker 001; Riccardo Cantoro; Nikolaos Ioannis Deligiannis; Nourhan Elhamawy; Tobias Faller; Carles Hernández 001; Nele Mentens; Mahnaz Namazi Rizi; Ilia Polian; et al. (ETS, 2023)

Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications. - Mujtaba Hassan; Arish Sateesan; Jo Vliegen; Stjepan Picek; Nele Mentens (EvoApplications@EvoStar, 2023)

Preface. - Ioannis Sourdis; Nele Mentens; Leonel Sousa; Pedro Trancoso (FPL, 2023)

Application-specific FPGAs: cryptographic agility through customized reconfigurable architectures. - Jelle Biesmans; Francesco Regazzoni 001; Nele Mentens (IPDPS Workshops, 2023)

Evaluation of Secure Circuit Styles Using Unipolar Logic Gates. - Jelle Biesmans; Kris Myny; Nele Mentens (NEWCAS, 2023)

ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. - Simon Scherrer; Jo Vliegen; Arish Sateesan; Hsu-Chun Hsiao; Nele Mentens; Adrian Perrig (SRDS, 2023)

Quantization-aware Neural Architectural Search for Intrusion Detection. - Rabin Yu Acharya; Laurens Le Jeune; Nele Mentens; Fatemeh Ganji; Domenic Forte (CoRR, 2023)

Impact of Emerging Hardware on Security and Privacy. - Trent Jaeger; Brent ByungHoon Kang; Nele Mentens; Cynthia Sturton (IEEE Secur. Priv., 2023)

Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware. - Arish Sateesan; Jelle Biesmans; Thomas Claesen; Jo Vliegen; Nele Mentens (Microprocess. Microsystems, 2023)

PROVE: Provable remote attestation for public verifiability. - Edlira Dushku; Md Masoom Rabbani; Jo Vliegen; An Braeken; Nele Mentens (J. Inf. Secur. Appl., 2023)

Evaluation of Lightweight Machine Learning-Based NIDS Techniques for Industrial IoT. - Alex Baron; Laurens Le Jeune; Wouter Hellemans; Md Masoom Rabbani; Nele Mentens (ACNS Workshops (1), 2024)

PROACT - Physical Attack Resistance of Cryptographic Algorithms and Circuits with Reduced Time to Market. - Asmita Adhikary; Abraham Basurto; Lejla Batina; Ileana Buhan; Joan Daemen; Silvia Mella; Nele Mentens; Stjepan Picek; Durga Lakshmi Ramachandran; Abolfazl Sajadi; Todor Stefanov; Dennis Vermoen; et al. (ARC, 2024)

Trusted Computing Architectures for IoT Devices. - An Braeken; Bruno da Silva 001; Laurent Segers; Johannes Knödtel; Marc Reichenbach; Cornelia Wulf; Sergio A. Pertuz 001; Diana Göhringer; Jo Vliegen; Md Masoom Rabbani; Nele Mentens (ARC, 2024)

HAGAR: Hashgraph-based Aggregated Communication and Remote Attestation. - Jo Vliegen; Md Masoom Rabbani; Wouter Hellemans; Nele Mentens (CF (Companion), 2024)

Optimised AES with RISC-V Vector Extensions. - Mahnaz Namazi Rizi; Nusa Zidaric; Lejla Batina; Nele Mentens (DDECS, 2024)

A Systematic Exploration of Evolutionary Computation for the Design of Hardware-oriented Non-cryptographic Hash Functions. - Mujtaba Hassan; Jo Vliegen; Stjepan Picek; Nele Mentens (GECCO, 2024)

A Systematic Comparison of Side-channel Countermeasures for RISC-V-based SoCs. - Abolfazl Sajadi; Nusa Zidaric; Todor Stefanov; Nele Mentens (NorCAS, 2024)

A Genetic Programming approach for hardware-oriented hash functions for network security applications. - Mujtaba Hassan; Arish Sateesan; Jo Vliegen; Stjepan Picek; Nele Mentens (Appl. Soft Comput., 2024)

Hardware Security in the Era of Emerging Device and System Technologies. - Nele Mentens (IEEE Secur. Priv., 2024)

Special Section on Emerging Topics in Hardware Computing Systems Security. - Gang Qu 001; Debdeep Mukhopadhyay; Nele Mentens; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2024)

AutoPOI: automated points of interest selection for side-channel analysis. - Mick G. D. Remmerswaal; Lichao Wu; Sébastien Tiran; Nele Mentens (J. Cryptogr. Eng., 2024)

SPArch: A Hardware-oriented Sketch-based Architecture for High-speed Network Flow Measurements. - Arish Sateesan; Jo Vliegen; Simon Scherrer; Hsu-Chun Hsiao; Adrian Perrig; Nele Mentens (ACM Trans. Priv. Secur., 2024)

Introduction to the Special Issue on FPGA-based Embedded Systems for Industrial and IoT Applications. - Satwant Singh; Carlos Enrique Montenegro-Marín; Yun (Eric) Liang; Yao Chen 008; Nele Mentens; Raymond Nijssen (ACM Trans. Reconfigurable Technol. Syst., 2024)

FLARE: An FPGA-Based Universal Large Flow Detection Engine. - Arish Sateesan; Jo Vliegen; Nele Mentens (ARC, 2025)

SPARK: Secure Privacy-Preserving Anonymous Swarm Attestation for In-Vehicle Networks. - Wouter Hellemans; Nada El Kassem; Md Masoom Rabbani; Edlira Dushku; Liqun Chen 002; An Braeken; Bart Preneel; Nele Mentens (EuroS&P, 2025)

Designing Hardware-Friendly Hash Functions for Network Security Using Cartesian Genetic Programming. - Mujtaba Hassan; Jo Vliegen; Stjepan Picek; Nele Mentens (EvoApplications (2), 2025)

A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search. - Konstantina Miteloudi; Lejla Batina; Nele Mentens (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

P2W: From Power Traces to Weights Matrix - An Unconventional Transfer Learning Approach. - Roozbeh Siyadatzadeh; Fatemeh Mehrafrooz; Nele Mentens; Todor P. Stefanov (CoRR, 2025)