Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a 600MHz CMOS Microprocessor. - Nevine Nassif; Madhav P. Desai; Dale H. Hall (DAC, 1998)

Static race verification for networks with reconvergent clocks. - Joel Grodstein; Nick Rethman; Nevine Nassif (ICCD, 1998)

Timing verification of the 21264: A 600 MHz full-custom microprocessor. - Emily J. Shriver; Dale H. Hall; Nevine Nassif; Nadir E. Rahman; Nick L. Rethman; Gill Watt; Jim A. Farrell (ICCD, 1998)

4.5 The Xeon® processor E5-2600 v3: A 22nm 18-core product family. - William J. Bowhill; Blaine A. Stackhouse; Nevine Nassif; Zibing Yang; Arvind Raghavan; Charles Morganti; Chris Houghton; Dan Krueger; Olivier Franza; Jayen Desai; Jason Crop; Dave Bradley; et al. (ISSCC, 2015)

The Xeon® Processor E5-2600 v3: a 22 nm 18-Core Product Family. - William J. Bowhill; Blaine A. Stackhouse; Nevine Nassif; Zibing Yang; Arvind Raghavan; Oscar Mendoza; Charles Morganti; Chris Houghton; Dan Krueger; Olivier Franza; Jayen Desai; Jason Crop; et al. (IEEE J. Solid State Circuits, 2016)

Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor. - Nevine Nassif; Ashley O. Munch; Carleton L. Molnar; Gerald Pasdast; Sitaraman V. Lyer; Zibing Yang; Oscar Mendoza; Mark Huddart; Srikrishnan Venkataraman; Sireesha Kandula; Rafi Marom; Alexandra M. Kern; et al. (ISSCC, 2022)

2.3 Emerald Rapids: 5th-Generation Intel® Xeon® Scalable Processors. - Ashley O. Munch; Nevine Nassif; Carleton L. Molnar; Jason Crop; Rich Gammack; Chinmay P. Joshi; Goran Zelic; Kambiz Munshi; Min Huang; Charles Morganti; Sireesha Kandula; Arijit Biswas (ISSCC, 2024)