Memory-efficient TCP reassembly using FPGA. - Tran Huy Vu; Nguyen Quoc Tuan; Tran Ngoc Thinh; Nguyen Tran Huu Nguyen (SoICT, 2011)

Reconfiguration Control Networks for TMR Systems with Module-Based Recovery. - Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Zhuoran Zhao 002; Tong Wu 007; Ediz Cetin; Oliver Diessel; Lingkan Gong (FCCM, 2016)

A Programmable Configuration Controller for fault-tolerant applications. - Lingkan Gong; Tong Wu 007; Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Zhuoran Zhao 002; Ediz Cetin; Oliver Diessel (FPT, 2016)

Dynamic scheduling of voter checks in FPGA-based TMR systems. - Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Ediz Çetin; Oliver Diessel (FPT, 2016)

Fine-grained module-based error recovery in FPGA-based TMR systems. - Zhuoran Zhao 002; Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Ediz Çetin; Oliver Diessel (FPT, 2016)

Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systems. - Nguyen T. H. Nguyen; Ediz Cetin; Oliver Diessel (DFT, 2017)

Scheduling Considerations for Voter Checking in TMR-MER Systems. - Nguyen T. H. Nguyen; Ediz Cetin; Oliver Diessel (FCCM, 2017)

Reliable SEU monitoring and recovery using a programmable configuration controller. - Lingkan Gong; Alexander Kroh; Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Ediz Cetin; Oliver Diessel (FPL, 2017)

Repairing FPGA configuration memory errors using dynamic partial reconfiguration. - Nguyen Tran Huu Nguyen (2017)

Penalty Shutdown Mitigation in Wireless Sensor Networks Powered by Ambient Energy. - Trong Nhan Le; Nguyen Tran Huu Nguyen; Tan-Phuong Vo; The-Duy Phan-Dinh; Hoang-Anh Pham (CSoNet, 2018)

Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery. - Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Zhuoran Zhao 002; Tong Wu 007; Ediz Cetin; Oliver Diessel; Lingkan Gong (Microprocess. Microsystems, 2018)

Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems. - Zhuoran Zhao 002; Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Ganghee Lee; Ediz Cetin; Oliver Diessel (ACM Trans. Reconfigurable Technol. Syst., 2018)

Scheduling configuration memory error checks to improve the reliability of FPGA-based systems. - Nguyen Tran Huu Nguyen; Ediz Cetin; Oliver Diessel (IET Comput. Digit. Tech., 2019)