Preconditioners for regularized image superresolution. - Nhat Nguyen; Gene H. Golub; Peyman Milanfar (ICASSP, 1999)

An Efficient Wavelet-Based Algorithm for Image Superresolution. - Nhat Nguyen; Peyman Milanfar (ICIP, 2000)

A computationally efficient superresolution image reconstruction algorithm. - Nhat Nguyen; Peyman Milanfar; Gene H. Golub (IEEE Trans. Image Process., 2001)

Efficient generalized cross-validation with applications to parametric image restoration and resolution enhancement. - Nhat Nguyen; Peyman Milanfar; Gene H. Golub (IEEE Trans. Image Process., 2001)

Computational Science and Engineering Online (CSE-Online): A Cyber-Infrastructure for Scientific Computing. - Thanh N. Truong; Manohar Nayak; Hung H. Huynh; Tom Cook; Priya Mahajan; Le-Thuy T. Tran; Jannu Bharath; Shrish Jain; Ha B. Pham; Chaiwoot Boonyasiriwat; Nhat Nguyen; Evan Andersen; et al. (J. Chem. Inf. Model., 2006)

Support-Graph Preconditioners. - Marshall W. Bern; John R. Gilbert; Bruce Hendrickson; Nhat Nguyen; Sivan Toledo (SIAM J. Matrix Anal. Appl., 2006)

A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR. - Brian S. Leibowitz; Jade Kizer; Haechang Lee; Fred Chen; Andrew Ho; Metha Jeeradit; Akash Bansal; Trey Greer; Simon Li; Ramin Farjad-Rad; William F. Stonecypher; Yohan Frans; et al. (ISSCC, 2007)

A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface. - Haechang Lee; Kun-Yung Ken Chang; Jung-Hoon Chun; Ting Wu 003; Yohan Frans; Brian S. Leibowitz; Nhat Nguyen; T. J. Chin; Kambiz Kaviani; Jie Shen 010; Xudong Shi 004; Wendemagegnehu T. Beyene; et al. (IEEE J. Solid State Circuits, 2009)

A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling. - Brian S. Leibowitz; Robert Palmer; John Poulton; Yohan Frans; Simon Li; John M. Wilson 002; Michael Bucher; Andrew M. Fuller; John G. Eyles; Marko Aleksic; Trey Greer; Nhat Nguyen (IEEE J. Solid State Circuits, 2010)

Power-efficient I/O design considerations for high-bandwidth applications. - John C. Eble; Scott Best; Brian S. Leibowitz; Lei Luo 006; Robert Palmer; John M. Wilson 002; Jared Zerbe; Amir Amirkhany; Nhat Nguyen (CICC, 2011)

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems. - Kambiz Kaviani; Michael Bucher; Bruce Su; Barry Daly; Bill Stonecypher; Wayne D. Dettloff; Teva Stone; Kashinath Prabhu; Pravin Kumar Venkatesan; Fred Heaton; Ravi T. Kollipara; Yi Lu; et al. (ISSCC, 2013)

An Adaptive Body-Biased Clock Generation System in 28nm CMOS. - Makarand Shirasgaonkar; Roxanne Vu; Deborah Dressler; Nhat Nguyen; Kambiz Kaviani; Yueyong Wang (VLSID, 2014)

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems. - Michael Bucher; Ravi T. Kollipara; Bruce Su; Liji Gopalakrishnan; Kashinath Prabhu; Pravin Kumar Venkatesan; Kambiz Kaviani; Barry Daly; William F. Stonecypher; Wayne D. Dettloff; Teva Stone; Fred Heaton; et al. (IEEE J. Solid State Circuits, 2014)

A Context-Aware Healthcare Architecture for the Elderly. - Tolulope Peter Oyekanmi; Nhat Nguyen; Vangalur S. Alagar (ICCASA, 2015)

Dependable Traffic Control Strategies for Urban and Freeway Networks. - Kaiyu Wan; Nhat Nguyen; Vangalur S. Alagar (Mob. Networks Appl., 2016)

A Bimodal (NRZ/PAM-4) ISI Tolerant Timing Recovery with Adaptive DDJ Equalization. - Masum Hossain; Aurangozeb; Nhat Nguyen (A-SSCC, 2018)

DDJ-Adaptive SAR TDC-Based Timing Recovery for Multilevel Signaling. - Masum Hossain; Aurangozeb; Nhat Nguyen (IEEE J. Solid State Circuits, 2019)

The Roads of Your Veins: Visualizing Map and Vein Data Matching. - Yoon Chung Han; Nhat Nguyen (CHI Extended Abstracts, 2020)

6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET. - Eric Groen; Charlie Boecker; Masum Hossain; Roxanne Vu; Socrates D. Vamvakos; Haidang Lin; Simon Li; Marcus van Ierssel; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Mohammad Hossein Taghavi; et al. (ISSCC, 2020)

Voting shrinkage algorithm for Covariance Matrix Estimation and its application to portfolio selection. - Tuan Tran; Nhat Nguyen; Trung Nguyen; An Mai (RIVF, 2020)

A 4×112 Gb/s ADC-DSP Based Multistandard Receiver in 7nm FinFET. - Haidang Lin; Charles Boecker; Masum Hossain; Shankar Tangirala; Roxanne Vu; Socrates D. Vamvakos; Eric Groen; Simon Li; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Hossein Taghavi; et al. (VLSI Circuits, 2020)

11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS. - Ravi Shivnaraine; Marcus van Ierssel; Kamran Farzan; Dominic DiClemente; George Ng; Nanyan Wang; Javid Musayev; Gairik Dutta; Masumi Shibata; Arash Moradi; Haleh Vahedi; Manavi Farzad; et al. (ISSCC, 2021)

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture. - Eric Groen; Charlie Boecker; Masum Hossain; Roxanne Vu; Socrates D. Vamvakos; Haidang Lin; Simon Li; Marcus van Ierssel; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Mohammad Hossein Taghavi; et al. (IEEE J. Solid State Circuits, 2021)

ADC-DSP-Based 10-to-112-Gb/s Multi-Standard Receiver in 7-nm FinFET. - Haidang Lin; Charlie Boecker; Masum Hossain; Shankar Tangirala; Roxanne Vu; Socrates D. Vamvakos; Eric Groen; Simon Li; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Hossein Taghavi; et al. (IEEE J. Solid State Circuits, 2021)

Approach portfolio selection for Vietnamese stock market based on nonlinear shrinkage method. - An Mai; Nhat Nguyen; Q. Phu Nguyen; Tuan Tran (KSE, 2022)

Multi-Agent Data Collection in Non-Stationary Environments. - Nhat Nguyen; Duong Nguyen; Junae Kim; Gianluca Rizzo; Hung Nguyen 004 (WoWMoM, 2022)

United We Stand: Decentralized Multi-Agent Planning with Attrition. - Nhat Nguyen; Duong Nguyen; Gianluca Rizzo; Hung Nguyen 004 (ECAI, 2024)

Decentralized Coordination for Multi-Agent Data Collection in Dynamic Environments. - Nhat Nguyen; Duong Nguyen; Junae Kim; Gianluca Rizzo; Hung X. Nguyen (IEEE Trans. Mob. Comput., 2024)