Stacked Filters Stationary Flow For Hardware-Oriented Acceleration Of Deep Convolutional Neural Networks. - Yuechao Gao; Nianhong Liu; Sheng Zhang (ICLR (Workshop), 2018)

FPGA Implementations of 3D-SIMD Processor Architecture for Deep Neural Networks Using Relative Indexed Compressed Sparse Filter Encoding Format and Stacked Filters Stationary Flow. - Yuechao Gao; Nianhong Liu; Sheng Zhang (CoRR, 2018)