Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. - Scott Little; David Walter; Nicholas Seegmiller; Chris J. Myers; Tomohiro Yoneda (ATVA, 2004)

The Case for Analog Circuit Verification. - Chris J. Myers; Reid R. Harrison; David Walter; Nicholas Seegmiller; Scott Little (FAC, 2005)

Verification of analog/mixed-signal circuits using labeled hybrid petri nets. - Scott Little; Nicholas Seegmiller; David Walter; Chris J. Myers; Tomohiro Yoneda (ICCAD, 2006)

Symbolic Model Checking of Analog/Mixed-Signal Circuits. - David Walter; Scott Little; Nicholas Seegmiller; Chris J. Myers; Tomohiro Yoneda (ASP-DAC, 2007)

Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods. - David Walter; Scott Little; Chris J. Myers; Nicholas Seegmiller; Tomohiro Yoneda (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)