Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages. - Nick Lindert; Toshihiro Sugii; Stephen Tang; Chenming Hu (IEEE J. Solid State Circuits, 1999)

13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology. - Fatih Hamzaoglu; Umut Arslan; Nabhendra Bisnik; Swaroop Ghosh; Manoj B. Lal; Nick Lindert; Mesut Meterelliyoz; Randy B. Osborne; Joodong Park; Shigeki Tomishima; Yih Wang; Kevin Zhang 001 (ISSCC, 2014)

A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology. - Fatih Hamzaoglu; Umut Arslan; Nabhendra Bisnik; Swaroop Ghosh; Manoj B. Lal; Nick Lindert; Mesut Meterelliyoz; Randy B. Osborne; Joodong Park; Shigeki Tomishima; Yih Wang; Kevin Zhang 001 (IEEE J. Solid State Circuits, 2015)