VLSI Design of a High-Throughput Multi-Rate Decoder for Structured LDPC Codes. - Massimo Rovini; Nicola E. L'Insalata; Francesco Rossi; Luca Fanucci (DSD, 2005)

High-Throughput Multi-Rate Decoding of Structured Low-Density Parity-Check Codes. - Luca Fanucci; Massimo Rovini; Nicola E. L'Insalata; Francesco Rossi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Layered Decoding of Non-Layered LDPC Codes. - Massimo Rovini; Francesco Rossi; Pasquale Ciao; Nicola E. L'Insalata; Luca Fanucci (DSD, 2006)

High-precision LDPC codes decoding at the lowest complexity. - Massimo Rovini; Francesco Rossi; Nicola E. L'Insalata; Luca Fanucci (EUSIPCO, 2006)

Low complexity LDPC code decoders for next generation standards. - Torben Brack; Matthias Alles; Timo Lehnigk-Emden; Frank Kienle; Norbert Wehn; Nicola E. L'Insalata; Francesco Rossi; Massimo Rovini; Luca Fanucci (DATE, 2007)

Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. - Nicola E. L'Insalata; Sergio Saponara; Luca Fanucci; Pierangelo Terreni (DSD, 2007)

Hardware/Software FPGA-based Network Emulator for High-speed On-board Communications. - Sergio Saponara; Nicola E. L'Insalata; Tony Bacchillone; Esa Petri; Iacopo Del Corona; Luca Fanucci (DSD, 2008)

Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems. - Nicola E. L'Insalata; Sergio Saponara; Luca Fanucci; Pierangelo Terreni (IEICE Trans. Electron., 2008)

Low-Complexity Link Microarchitecture for Mesochronous Communication in Networks-on-Chip. - Francesco Vitullo; Nicola E. L'Insalata; Esa Petri; Sergio Saponara; Luca Fanucci; Michele Casula; Riccardo Locatelli; Marcello Coppola (IEEE Trans. Computers, 2008)

System-on-chip Computing and Interconnection Architectures for Telecommunications and Signal Processing. - Nicola E. L'Insalata (2008)

Low-complexity FFT/IFFT IP hardware macrocells for OFDM and MIMO-OFDM CMOS transceivers. - Sergio Saponara; Nicola E. L'Insalata; Luca Fanucci (Microprocess. Microsystems, 2009)