Direct digital frequency synthesis with dual-slope approach. - Antonio Giuseppe Maria Strollo; Davide De Caro; Ettore Napoli; Nicola Petra (ESSCIRC, 2003)

High-speed direct digital frequency synthesizers in 0.25-μm CMOS. - Antonio G. M. Strollo; Davide De Caro; Ettore Napoli; Nicola Petra (CICC, 2004)

An area-efficient high-speed Reed-Solomon decoder in 0.25 μm CMOS. - Antonio Giuseppe Maria Strollo; Nicola Petra; Davide De Caro; Ettore Napoli (ESSCIRC, 2004)

A high-speed sense-amplifier based flip-flop. - Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ECCTD, 2005)

Dual-Tree Error Compensation for High Performance Fixed-Width Multipliers. - Antonio G. M. Strollo; Nicola Petra; Davide De Caro (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A novel high-speed sense-amplifier-based flip-flop. - Antonio G. M. Strollo; Davide De Caro; Ettore Napoli; Nicola Petra (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A 630MHz direct digital frequency synthesizer with 90dBc SFDR in 0.25µm CMOS. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (ISSCC, 2006)

A 380MHz, 150mW direct digital synthesizer/mixer in 0.25µm CMOS. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (ISSCC, 2006)

Code compression for ARM7 embedded systems. - Valeria Garofalo; Ettore Napoli; Nicola Petra; Antonio Giuseppe Maria Strollo (ECCTD, 2007)

Design of fixed-width multipliers with minimum mean square error. - Nicola Petra; Davide De Caro; Antonio G. M. Strollo (ECCTD, 2007)

High Speed Galois Fields GF(2m) Multipliers. - Nicola Petra; Davide De Caro; Antonio G. M. Strollo (ECCTD, 2007)

A 380 MHz Direct Digital Synthesizer/Mixer With Hybrid CORDIC Architecture in 0.25 µm CMOS. - Davide De Caro; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE J. Solid State Circuits, 2007)

A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique. - Antonio Giuseppe Maria Strollo; Davide De Caro; Nicola Petra (IEEE J. Solid State Circuits, 2007)

A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme. - Nicola Petra; Davide De Caro; Antonio G. M. Strollo (IEEE Trans. Computers, 2007)

Low error truncated multipliers for DSP applications. - Valeria Garofalo; Nicola Petra; Davide De Caro; Antonio G. M. Strollo; Ettore Napoli (ICECS, 2008)

A high-speed and high-accuracy interpolator for digital modems. - Nicola Petra; Alan N. Willson Jr. (ICECS, 2008)

Constrained piecewise polinomial approximation for hardware implementation of elementary functions. - Antonio G. M. Strollo; Davide De Caro; Nicola Petra; Ettore Napoli; Valeria Garofalo (ICECS, 2008)

A high performance floating-point special function unit using constrained piecewise quadratic approximation. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (ISCAS, 2008)

A 430 MHz, 280 mW Processor for the Conversion of Cartesian to Polar Coordinates in 0.25 µm CMOS. - Antonio Giuseppe Maria Strollo; Davide De Caro; Nicola Petra (IEEE J. Solid State Circuits, 2008)

Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Digital Synthesizer/Mixer With Hybrid CORDIC-Multiplier Architecture: Error Analysis and Optimization. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

High-Performance Special Function Unit for Programmable 3-D Graphics Processors. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

High-speed differential resistor ladder for A/D converters. - Davide De Caro; Marino Coppola; Nicola Petra; Ettore Napoli; Antonio G. M. Strollo; Valeria Garofalo (ISCAS, 2010)

A novel truncated squarer with linear compensation function. - Valeria Garofalo; Marino Coppola; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ISCAS, 2010)

Fixed-width CSD multipliers with minimum mean square error. - Nicola Petra; Davide De Caro; Antonio G. M. Strollo; Valeria Garofalo; Ettore Napoli; Marino Coppola; Pietro Todisco (ISCAS, 2010)

A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS. - Davide De Caro; Carlo Alberto Romani; Nicola Petra; Antonio G. M. Strollo; Claudio Parrella (IEEE J. Solid State Circuits, 2010)

Truncated Binary Multipliers With Variable Correction and Minimum Mean Square Error. - Nicola Petra; Davide De Caro; Valeria Garofalo; Ettore Napoli; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error. - Valeria Garofalo; Nicola Petra; Ettore Napoli (IEEE Trans. Computers, 2011)

Elementary Functions Hardware Implementation Using Constrained Piecewise-Polynomial Approximations. - Antonio G. M. Strollo; Davide De Caro; Nicola Petra (IEEE Trans. Computers, 2011)

Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Efficient Logarithmic Converters for Digital Signal Processing Applications. - Davide De Caro; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Design of Fixed-Width Multipliers With Linear Compensation Function. - Nicola Petra; Davide De Caro; Valeria Garofalo; Ettore Napoli; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies. - Tommaso Addabbo; Davide De Caro; Ada Fort; Nicola Petra; Santina Rocchi; Valerio Vignoli (Int. J. Circuit Theory Appl., 2012)

A high-speed differential resistor ladder. - Davide De Caro; Marino Coppola; Nicola Petra (Microelectron. J., 2012)

FPGA Implementation of Gaussian Mixture Model Algorithm for 47 fps Segmentation of 1080p Video. - Mariangela Genovese; Ettore Napoli; Davide De Caro; Nicola Petra; Antonio G. M. Strollo (J. Electr. Comput. Eng., 2013)

NORA based TDC in 90 nm CMOS. - Nicola Petra; Sebastiano Russo; Davide De Caro; Ettore Napoli; Giancarlo Barbarino; Antonio G. M. Strollo (Microelectron. J., 2013)

Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error. - Davide De Caro; Nicola Petra; Antonio Giuseppe Maria Strollo; Fabio Tessitore; Ettore Napoli (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Analysis of Spread-Spectrum Clocking Modulations Under Synchronization Timing Constraint. - Davide De Caro; Michele De Martino; Nicola Petra; Antonio G. M. Strollo (ApplePies, 2014)

Hardware performance versus video quality trade-off for Gaussian mixture model based background identification systems. - Mariangela Genovese; Ettore Napoli; Nicola Petra (ICDIP, 2014)

Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA. - Mariangela Genovese; Ettore Napoli; Davide De Caro; Nicola Petra; Antonio G. M. Strollo (Integr., 2014)

Truncated squarer with minimum mean-square error. - Nicola Petra; Davide De Caro; Valeria Garofalo; Ettore Napoli; Antonio G. M. Strollo (Microelectron. J., 2014)

Accurate Fixed-Point Logarithmic Converter. - Davide De Caro; Mariangela Genovese; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. - Alessandro Cilardo; Davide De Caro; Nicola Petra; Francesco Caserta; Nicola Mazzocca; Ettore Napoli; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images. - Mariangela Genovese; Paolo Bifulco; Davide De Caro; Ettore Napoli; Nicola Petra; Maria Romano; Mario Cesarelli; Antonio G. M. Strollo (Integr., 2015)

A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS. - Davide De Caro; Fabio Tessitore; Gianfranco Vai; Nicola Imperato; Nicola Petra; Ettore Napoli; Claudio Parrella; Antonio G. M. Strollo (IEEE J. Solid State Circuits, 2015)

Variable Latency Speculative Han-Carlson Adder. - Darjn Esposito; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs. - Darjn Esposito; Gerardo Castellano; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ISCAS, 2016)

On the use of approximate adders in carry-save multiplier-accumulators. - Darjn Esposito; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ISCAS, 2017)

Single Flip-Flop Driving Circuit for Glitch-Free NAND-Based Digitally Controlled Delay-Lines. - Davide De Caro; Fabio Tessitore; Gianfranco Vai; Gerardo Castellano; Ettore Napoli; Nicola Petra; Claudio Parrella; Antonio G. M. Strollo (Circuits Syst. Signal Process., 2017)

A SISO Register Circuit Tailored for Input Data with Low Transition Probability. - Ettore Napoli; Gerardo Castellano; Davide De Caro; Darjn Esposito; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Computers, 2017)

Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding. - Davide De Caro; Ettore Napoli; Darjn Esposito; Gerardo Castellano; Nicola Petra; Antonio G. M. Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. - Ettore Napoli; Gerardo Castellano; Davide De Caro; Darjn Esposito; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Efficient Implementation of Recurrent Neural Network Accelerators. - Vida Abdolzadeh; Nicola Petra (ApplePies, 2018)

On the Use of Approximate Multipliers in LMS Adaptive Filters. - Darjn Esposito; Gennaro Di Meo; Davide De Caro; Nicola Petra; Ettore Napoli; Antonio G. M. Strollo (ISCAS, 2018)

Stall-Aware Fixed-Point Implementation of LMS Filters. - Darjn Esposito; Gennaro Di Meo; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (PRIME, 2018)

Approximate Multipliers Based on New Approximate Compressors. - Darjn Esposito; Antonio Giuseppe Maria Strollo; Ettore Napoli; Davide De Caro; Nicola Petra (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability. - Michele De Martino; Davide De Caro; Darjn Esposito; Ettore Napoli; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Variable-Rounded LMS Filter for Low-Power Applications. - Gennaro Di Meo; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ApplePies, 2019)

Piecewise Linear Chaotic Maps in Current Mode CMOS Circuits: Nonlinear Distortion Analysis. - Tommaso Addabbo; Ada Fort; Marco Mugnaini; Hadis Takaloo; Valerio Vignoli; Nicola Petra (ISCAS, 2019)

An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy. - Gerardo Castellano; Davide De Caro; Darjn Esposito; Paolo Bifulco; Ettore Napoli; Nicola Petra; Emilio Andreozzi; Mario Cesarelli; Antonio G. M. Strollo (Circuits Syst. Signal Process., 2019)

Self-tunable chaotic true random bit generator in current-mode CMOS circuit with nonlinear distortion analysis. - Tommaso Addabbo; Ada Fort; Marco Mugnaini; Nicola Petra; Hadis Takaloo; Valerio Vignoli (Int. J. Circuit Theory Appl., 2019)

Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding. - Gennaro Di Meo; Davide De Caro; Ettore Napoli; Nicola Petra; Antonio G. M. Strollo (ICECS, 2020)

Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor. - Antonio G. M. Strollo; Davide De Caro; Ettore Napoli; Nicola Petra; Gennaro Di Meo (ISCAS, 2020)

A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications. - Davide De Caro; Gennaro Di Meo; Ettore Napoli; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst., 2020)

A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. - Ettore Napoli; Davide De Caro; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers. - Antonio Giuseppe Maria Strollo; Ettore Napoli; Davide De Caro; Nicola Petra; Gennaro Di Meo (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A novel low-power DLMS adaptive filter with sign-magnitude learning and approximated FIR section. - Gennaro Di Meo; Davide De Caro; Nicola Petra; Antonio G. M. Strollo (PRIME, 2022)

A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error. - Gennaro Di Meo; Davide De Caro; Giacinto Paolo Saggese; Ettore Napoli; Nicola Petra; Antonio Giuseppe Maria Strollo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements. - Antonio Giuseppe Maria Strollo; Ettore Napoli; Davide De Caro; Nicola Petra; Giacinto Paolo Saggese; Gennaro Di Meo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. - Fabrizio Ferrandi; Serena Curzel; Leandro Fiorin; Daniele Ielmini; Cristina Silvano; Francesco Conti 001; Alessio Burrello; Francesco Barchi; Luca Benini; Luciano Lavagno; Teodoro Urso; Enrico Calore; et al. (CoRR, 2023)

A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. - Cristina Silvano; Daniele Ielmini; Fabrizio Ferrandi; Leandro Fiorin; Serena Curzel; Luca Benini; Francesco Conti 001; Angelo Garofalo; Cristian Zambelli; Enrico Calore; Sebastiano Fabio Schifano; Maurizio Palesi; et al. (ACM Comput. Surv., 2025)