Design and implementation of the POWER5 microprocessor. - Joachim G. Clabes; Joshua Friedrich; Mark Sweet; Jack DiLullo; Sam G. Chu; Donald W. Plass; James Dawson; Paul Muench; Larry Powell; Michael S. Floyd; Balaram Sinharoy; Mike Lee; et al. (DAC, 2004)

IBM POWER6 microprocessor physical design and design methodology. - Rex Berridge; Robert M. Averill III; Arnold E. Barish; Michael A. Bowen; Peter J. Camporese; Jack DiLullo; Peter E. Dudley; Joachim Keinert; David W. Lewis; Robert D. Morel; Thomas E. Rosser; Nicole S. Schwartz; et al. (IBM J. Res. Dev., 2007)

Runtime power reduction capability of the IBM POWER7+ chip. - Michael S. Floyd; Alan J. Drake; Nicole S. Schwartz; Robert W. Berry; Charles Lefurgy; Malcolm S. Ware; Karthick Rajamani; Victor V. Zyuban; Richard L. Willaman; Ruby M. Zgabay (IBM J. Res. Dev., 2013)