High-speed energy-efficient bi-directional transceiver for on-chip global interconnects. - Nijwm Wary; Pradip Mandal (IET Circuits Devices Syst., 2015)

Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects. - Nijwm Wary; Pradip Mandal (IEEE J. Solid State Circuits, 2017)

Current-Mode Triline Transceiver for Coded Differential Signaling Across On-Chip Global Interconnects. - Nijwm Wary; Pradip Mandal (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE. - Antroy Roy Chowdhury; Nijwm Wary; Pradip Mandal (MWSCAS, 2019)

Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. - Antroy Roy Chowdhury; Nijwm Wary; Pradip Mandal (VLSID, 2019)

All-Digital Calibration Algorithms to Correct for Static Non-Linearities in ADCs. - Paul Wenbo Chen; Nijwm Wary; Luke Wang; Qiwei Wang; Anthony Chan Carusone (ISCAS, 2020)

Discrete Multitone Signalling for Wireline Communication. - Behraz Vatankhahghadim; Nijwm Wary; Anthony Chan Carusone (ISCAS, 2020)

Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across on-chip global interconnects. - Nijwm Wary; Antroy Roy Chowdhury; Pradip Mandal (IET Circuits Devices Syst., 2020)

A Study of Discrete Multitone Modulation for Wireline Links Beyond 100 Gb/s. - Behraz Vatankhahghadim; Nijwm Wary; James Bailey 002; Anthony Chan Carusone (IEEE Open J. Circuits Syst., 2021)

A Study on Some Properties of Neutrosophic Multi Topological Group. - Bhimraj Basumatary; Nijwm Wary; Dimacha Dwibrang Mwchahary; Ashoke Kumar Brahma; Jwngsar Moshahary; Usha Rani Basumatary; Jili Basumatary (Symmetry, 2021)

Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects. - Prema Kumar Govindaswamy; Nijwm Wary; Vijaya Sankara Rao Pasupureddi (ISCAS, 2022)

A Low-Power Half-Rate Charge-Steering Hybrid for Full-Duplex Chip-to-Chip Interconnects. - Prema Kumar Govindaswamy; Nijwm Wary; Vijaya Sankara Rao Pasupureddi (ISCAS, 2022)

Design and Analysis of PVT Invariant Current Reference in 65-nm CMOS. - Nishant Maurya; Nijwm Wary (MWSCAS, 2022)

Current-integrating summer for DFE receiver with low common mode variation. - Poorna Chandrika Kondeti; Suraj Kumar Prusty; Nijwm Wary (Microelectron. J., 2022)

A 26 Gb/s Echo-Cancellation Based Simultaneous Bidirectional Transceiver in 65 nm CMOS. - V. K. Surya; Suraj Kumar Prusty; Nijwm Wary (ISCAS, 2023)

A Fully Integrated SCC DC-DC Converter with Novel FMC Controller for Fast Transient Response. - Sahil Dalvi; Pilli Kalyan Kumar; Olive Ray; Nijwm Wary (NEWCAS, 2023)

A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE). - Suraj Kumar Prusty; V. K. Surya; Nijwm Wary (NEWCAS, 2023)

Machine Learning based Adaptation for CTLE of Serial Links. - Sujal Reddy Kariveda; Suraj Kumar Prusty; Nijwm Wary (APCCAS, 2024)

Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. - Jahnvi Singh; Nijwm Wary; Pradip Mandal (VLSID, 2024)

Energy Efficient Integrated Summer and Latch-Based DFE With Reduced Tap Loading. - Suraj Kumar Prusty; V. K. Surya; Nijwm Wary (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link. - V. K. Surya; Suraj Kumar Prusty; Bibhu Datta Sahoo 002; Nijwm Wary (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Hybrid SST-CML Full Duplex Simultaneous Bi-Directional Signaling Link. - Sree Kumar R. G.; V. K. Surya; Nijwm Wary; Bibhu Datta Sahoo 003 (ISCAS, 2025)

A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links. - Pankaj Kumar; V. K. Surya; Sree Kumar R. G.; Bibhu Datta Sahoo 003; Nijwm Wary (ISCAS, 2025)

Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links. - Ankit Yadav; V. K. Surya; Sree Kumar R. G.; Bibhu Datta Sahoo 003; Nijwm Wary (ISCAS, 2025)

Pin Efficient Tri-Level Based Inductive Coupling Transceiver for 3D ICs. - Soumojit Bakshi; V. K. Surya; Nijwm Wary (VLSID, 2025)

A 0.0375-pJ/bit Charge-Steering Based Hybrid for 8-Gb/s/pin Full-Duplex Chip-to-Chip Interconnects in 65-nm CMOS. - Prema Kumar Govindaswamy; Nijwm Wary; Vijay Shankar Pasupureddi (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)