A Study on self-timed asynchronous subthreshold logic. - Niklas Lotze; Maurits Ortmanns; Yiannos Manoli (ICCD, 2007)

Frame Based Memory Access Interpolation for A Digital Communication Modulator. - Ruimin Huang; Markus Becker 003; Niklas Lotze; Yiannos Manoli (ICECS, 2007)

On Design a High Speed Sigma Delta DAC Modulator for a Digital Communication Transceiver on Chip. - Ruimin Huang; Niklas Lotze; Yiannos Manoli (DSD, 2008)

Variability of flip-flop timing at sub-threshold voltages. - Niklas Lotze; Maurits Ortmanns; Yiannos Manoli (ISLPED, 2008)

Timing modeling for digital sub-threshold circuits. - Niklas Lotze; Jacob Göppert; Yiannos Manoli (DATE, 2010)

A multiplierless structure for direct digital IF signal synthesis. - Ruimin Huang; Niklas Lotze; Markus Becker 003; Yiannos Manoli (ISCAS, 2010)

A Power-Efficient Tunable Narrow-Band Digital Front End for Bandpass Sigma-Delta ADCs in Digital FM Receivers. - Ahmed Shahein; Mohamed Afifi; Markus Becker 003; Niklas Lotze; Yiannos Manoli (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A 62mV 0.13μm CMOS standard-cell-based design technique using schmitt-trigger logic. - Niklas Lotze; Yiannos Manoli (ISSCC, 2011)

Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design. - Ruimin Huang; Chip-Hong Chang; Mathias Faust; Niklas Lotze; Yiannos Manoli (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A 62 mV 0.13 µ m CMOS Standard-Cell-Based Design Technique Using Schmitt-Trigger Logic. - Niklas Lotze; Yiannos Manoli (IEEE J. Solid State Circuits, 2012)

A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization. - Ahmed Shahein; Qiang Zhang; Niklas Lotze; Yiannos Manoli (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Ultra-Sub-Threshold Operation of Always-On Digital Circuits for IoT Applications by Use of Schmitt Trigger Gates. - Niklas Lotze; Yiannos Manoli (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)