Glitch minimization and dynamic element matching in D/A converters. - Mikael Karlsson Rudberg; Mark Vesterbacka; Niklas U. Andersson; J. Jacob Wikner (ICECS, 2000)

Dynamic element matching in D/A converters with restricted scrambling. - Mark Vesterbacka; Mikael Rudberg; J. Jacob Wikner; Niklas U. Andersson (ICECS, 2000)

Spectral shaping of DAC nonlinearity errors through modulation of expected errors. - K. Ola Andersson; Niklas U. Andersson; J. Jacob Wikner (ISCAS (3), 2001)

A differential DAC architecture with variable common-mode level. - K. Ola Andersson; Niklas U. Andersson; Mark Vesterbacka; J. Jacob Wikner (ISCAS (1), 2002)

A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture. - Niklas U. Andersson; Mark Vesterbacka (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Power-efficient time-to-digital converter for all-digital frequency locked loops. - Muhammad Touqir Pasha; Niklas U. Andersson; Mark Vesterbacka (ECCTD, 2015)