Hardware and Power Requirements of Self-checking circuits. - A. P. Kakaroudas; Kyriakos Papadomanolakis; E. Karaolis; Spiros Nikolaidis 001; Nikolaos Alachiotis 002; Costas E. Goutis (ICECS, 1999)

Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy. - Athanasios Milidonis; Nikolaos Alachiotis 002; Vasileios Porpodas; Haralambos Michail; Athanasios Kakarountas; Constantinos E. Goutis (DATE, 2007)

Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. - Athanasios Milidonis; Vasileios Porpodas; Nikolaos Alachiotis 002; Athanasios P. Kakarountas; Harris E. Michail; George A. Panagiotakopoulos; Costas E. Goutis (IET Comput. Digit. Tech., 2009)

Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. - Athanasios Milidonis; Nikolaos Alachiotis 002; Vasileios Porpodas; Harris E. Michail; George A. Panagiotakopoulos; Athanasios P. Kakarountas; Costas E. Goutis (J. Signal Process. Syst., 2010)

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization. - Vasilios I. Kelefouras; George Athanasiou; Nikolaos Alachiotis 002; Harris E. Michail; Angeliki Kritikakou; Costas E. Goutis (IEEE Trans. Signal Process., 2011)

A data locality methodology for matrix-matrix multiplication algorithm. - Nikolaos Alachiotis 002; Vasilios I. Kelefouras; George Athanasiou; Harris E. Michail; Angeliki Kritikakou; Costas E. Goutis (J. Supercomput., 2012)

Supervised machine learning models for student performance prediction. - Nikolaos S. Alachiotis; Sotiris Kotsiantis; Evangelos Sakkopoulos; Vassilios S. Verykios (Intell. Decis. Technol., 2022)