A High Resolution Flash Time-to-Digital Converter Taking Into Account Process Variability. - Nikolaos Minas; David Kinniment; Keith Heron; Gordon Russell 002 (ASYNC, 2007)

NoC Communication Strategies Using Time-to-Digital Conversion. - Crescenzo D'Alessandro; Nikolaos Minas; Keith Heron; David Kinniment; Alexandre Yakovlev (NOCS, 2007)

FPGA Implementation of an Asynchronous Processor with Both Online and Offline Testing Capabilities. - Nikolaos Minas; Matthew Marshall; Gordon Russell 002; Alex Yakovlev (ASYNC, 2008)

High resolution flash time-to-digital converter with sub-picosecond measurement capabilities. - Nikolaos Minas; David Kinniment; Gordon Russell 002; Alex Yakovlev (SoC, 2008)

Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. - Geert Van der Plas; Steven Thijs; Dimitri Linten; Guruprasad Katti; Paresh Limaye; Abdelkarim Mercha; Michele Stucchi; Herman Oprins; Bart Vandevelde; Nikolaos Minas; Miro Cupac; Morin Dehan; et al. (CICC, 2010)

3D integration: Circuit design, test, and reliability challenges. - Nikolaos Minas; Ingrid De Wolf; Erik Jan Marinissen; Michele Stucchi; Herman Oprins; Abdelkarim Mercha; Geert Van der Plas; Dimitrios Velenis; Pol Marchal (IOLTS, 2010)

Design issues and considerations for low-cost 3D TSV IC technology. - Geert Van der Plas; Paresh Limaye; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Domae Shinichi; Vladimir Cherman; et al. (ISSCC, 2010)

In-tier diagnosis of power domains in 3D TSV ICs. - Yuuki Araga; Makoto Nagata; Geert Van der Plas; Jaemin Kim; Nikolaos Minas; Pol Marchal; Youssef Travaly; Michael Libois; Antonio La Manna; Wenqi Zhang; Eric Beyne (3DIC, 2011)

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. - Geert Van der Plas; Paresh Limaye; Igor Loi; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Vladimir Cherman; et al. (IEEE J. Solid State Circuits, 2011)