On-chip Learning In A Conventional Silicon MOSFET Based Analog Hardware Neural Network. - Nilabjo Dey; Janak Sharda; Utkarsh Saxena; Divya Kaushik; Utkarsh Singh; Debanjan Bhowmik (BioCAS, 2019)

Reduction of the Weight-Decay Rate of Volatile Memory Synapses in an Analog Hardware Neural Network for Accurate and Scalable On-Chip Learning. - Janak Sharda; Nilabjo Dey; Ankesh Jain; Debanjan Bhowmik (ICONS, 2020)

Revisiting Reinforcement Learning for LLM Reasoning from A Cross-Domain Perspective. - Zhoujun Cheng; Shibo Hao; Tianyang Liu 003; Fan Zhou; Yutao Xie; Feng Yao; Yuexin Bian; Yonghao Zhuang 001; Nilabjo Dey; Yuheng Zha; Yi Gu; Kun Zhou; et al. (CoRR, 2025)