Micro-pages: increasing DRAM efficiency with locality-aware data placement. - Kshitij Sudan; Niladrish Chatterjee; David W. Nellans; Manu Awasthi; Rajeev Balasubramonian; Al Davis (ASPLOS, 2010)

Rethinking DRAM design and organization for energy-constrained multi-cores. - Aniruddha N. Udipi; Naveen Muralimanohar; Niladrish Chatterjee; Rajeev Balasubramonian; Al Davis; Norman P. Jouppi (ISCA, 2010)

Staged Reads: Mitigating the impact of DRAM writes on DRAM reads. - Niladrish Chatterjee; Naveen Muralimanohar; Rajeev Balasubramonian; Al Davis; Norman P. Jouppi (HPCA, 2012)

Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access. - Niladrish Chatterjee; Manjunath Shevgoor; Rajeev Balasubramonian; Al Davis; Zhen Fang 002; Ramesh Illikkal; Ravi R. Iyer 001 (MICRO, 2012)

Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device. - Manjunath Shevgoor; Jung-Sik Kim; Niladrish Chatterjee; Rajeev Balasubramonian; Al Davis; Aniruddha N. Udipi (MICRO, 2013)

Designing Efficient Memory Schedulers for Future Systems. - Niladrish Chatterjee (2013)

Managing DRAM Latency Divergence in Irregular GPGPU Applications. - Niladrish Chatterjee; Mike O'Connor; Gabriel H. Loh; Nuwan Jayasena; Rajeev Balasubramonian (SC, 2014)

Why graphics programmers need to know about DRAM. - Erik Brunvand; Niladrish Chatterjee; Daniel M. Kopta (SIGGRAPH Courses, 2014)

Anatomy of GPU Memory System for Multi-Application Execution. - Adwait Jog; Onur Kayiran; Tuba Kesten; Ashutosh Pattnaik; Evgeny Bolotin; Niladrish Chatterjee; Stephen W. Keckler; Mahmut T. Kandemir; Chita R. Das (MEMSYS, 2015)

Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems. - Kevin Hsieh; Eiman Ebrahimi; Gwangsun Kim; Niladrish Chatterjee; Mike O'Connor; Nandita Vijaykumar; Onur Mutlu; Stephen W. Keckler (ISCA, 2016)

Addressing service interruptions in memory with thread-to-rank assignment. - Manjunath Shevgoor; Rajeev Balasubramonian; Niladrish Chatterjee; Jung-Sik Kim (ISPASS, 2016)

CLARA: Circular Linked-List Auto and Self Refresh Architecture. - Aditya Agrawal; Mike O'Connor; Evgeny Bolotin; Niladrish Chatterjee; Joel S. Emer; Stephen W. Keckler (MEMSYS, 2016)

Architecting an Energy-Efficient DRAM System for GPUs. - Niladrish Chatterjee; Mike O'Connor; Donghyuk Lee; Daniel R. Johnson; Stephen W. Keckler; Minsoo Rhu; William J. Dally (HPCA, 2017)

Fine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems. - Mike O'Connor; Niladrish Chatterjee; Donghyuk Lee; John M. Wilson 002; Aditya Agrawal; Stephen W. Keckler; William J. Dally (MICRO, 2017)

Toward standardized near-data processing with unrestricted data placement for GPUs. - Gwangsun Kim; Niladrish Chatterjee; Mike O'Connor; Kevin Hsieh (SC, 2017)

Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms. - Kevin K. Chang; Abdullah Giray Yaglikçi; Saugata Ghose; Aditya Agrawal; Niladrish Chatterjee; Abhijith Kashyap; Donghyuk Lee; Mike O'Connor; Hasan Hassan; Onur Mutlu (CoRR, 2017)

Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. - Minsoo Rhu; Mike O'Connor; Niladrish Chatterjee; Jeff Pool; Stephen W. Keckler (CoRR, 2017)

Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. - Kevin K. Chang; Abdullah Giray Yaglikçi; Saugata Ghose; Aditya Agrawal; Niladrish Chatterjee; Abhijith Kashyap; Donghyuk Lee; Mike O'Connor; Hasan Hassan; Onur Mutlu (Proc. ACM Meas. Anal. Comput. Syst., 2017)

Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction. - Donghyuk Lee; Mike O'Connor; Niladrish Chatterjee (HPCA, 2018)

Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. - Minsoo Rhu; Mike O'Connor; Niladrish Chatterjee; Jeff Pool; Youngeun Kwon; Stephen W. Keckler (HPCA, 2018)

Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency. - Kevin K. Chang; Abdullah Giray Yaglikçi; Saugata Ghose; Aditya Agrawal; Niladrish Chatterjee; Abhijith Kashyap; Donghyuk Lee; Mike O'Connor; Hasan Hassan; Onur Mutlu (CoRR, 2018)

What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. - Saugata Ghose; Abdullah Giray Yaglikçi; Raghav Gupta; Donghyuk Lee; Kais Kudrolli; William X. Liu; Hasan Hassan; Kevin K. Chang; Niladrish Chatterjee; Aditya Agrawal; Mike O'Connor; Onur Mutlu (Proc. ACM Meas. Anal. Comput. Syst., 2018)

DeLTA: GPU Performance Model for Deep Learning Applications with In-Depth Memory System Traffic Analysis. - Sangkug Lym; Donghyuk Lee; Mike O'Connor; Niladrish Chatterjee; Mattan Erez (ISPASS, 2019)

Near-memory data transformation for efficient sparse matrix multi-vector multiplication. - Daichi Fujiki; Niladrish Chatterjee; Donghyuk Lee; Mike O'Connor (SC, 2019)

Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator. - Oreste Villa; Daniel Lustig; Zi Yan; Evgeny Bolotin; Yaosheng Fu; Niladrish Chatterjee; Nan Jiang 009; David W. Nellans (HPCA, 2021)

Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures. - Atefeh Mehrabi; Donghyuk Lee; Niladrish Chatterjee; Daniel J. Sorin; Benjamin C. Lee; Mike O'Connor (ISPASS, 2021)

Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings. - Mike O'Connor; Donghyuk Lee; Niladrish Chatterjee; Michael B. Sullivan 001; Stephen W. Keckler (HPCA, 2022)

GPU Domain Specialization via Composable On-Package Architecture. - Yaosheng Fu; Evgeny Bolotin; Niladrish Chatterjee; David W. Nellans; Stephen W. Keckler (ACM Trans. Archit. Code Optim., 2022)