On hierarchical statistical static timing analysis. - Bing Li 005; Ning Chen 006; Manuel Schmidt; Walter Schneider 001; Ulf Schlichtmann (DATE, 2009)

Timing model extraction for sequential circuits considering process variations. - Bing Li 005; Ning Chen 006; Ulf Schlichtmann (ICCAD, 2009)

Sensitivity based parameter reduction for statistical analysis of circuit performance. - Ning Chen 006; Bing Li 005; Ulf Schlichtmann (ICECS, 2009)

Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods. - Bing Li 005; Ning Chen 006; Ulf Schlichtmann (ICCAD, 2010)

Fast statistical timing analysis for circuits with Post-Silicon Tunable clock buffers. - Bing Li 005; Ning Chen 006 (ICCAD, 2011)

Timing Modeling of Flipflops Considering Aging Effects. - Ning Chen 006; Bing Li 005; Ulf Schlichtmann (PATMOS, 2011)

Iterative Timing Analysis Considering Interdependency of Setup and Hold Times. - Ning Chen 006; Bing Li 005; Ulf Schlichtmann (PATMOS, 2011)

Iterative timing analysis based on nonlinear and interdependent flipflop modelling. - Ning Chen 006; Bing Li 005; Ulf Schlichtmann (IET Circuits Devices Syst., 2012)

Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations. - Bing Li 005; Ning Chen 006; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

On Timing Model Extraction and Hierarchical Statistical Timing Analysis. - Bing Li 005; Ning Chen 006; Yang Xu 019; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Fast Statistical Timing Analysis for Circuits with Post-Silicon Tunable Clock Buffers. - Bing Li 005; Ning Chen 006; Ulf Schlichtmann (CoRR, 2017)