An Exact Analytical Time-Domain Model Of Distributed RC Interconnects for High Speed Nonlinear Circuit Applications. - Ninglong Lu; Ibrahim N. Hajj (Great Lakes Symposium on VLSI, 1999)

A reduced-order scheme for coupled lumped-distributed interconnect simulation. - Ninglong Lu; Ibrahim N. Hajj (ISCAS (6), 1999)

A hierarchical based approach for coupling aware delay analysis of combinational logic blocks. - Ninglong Lu; Ibrahim N. Hajj (ICECS, 2000)

Crosstalk Noise and Timing Analysis of Digital VLSI Circuits With Coupled Interconnects - Ninglong Lu (2000)

A Fast Coupling Aware Delay Estimation Scheme Based on Simplified Circuit Model. - Ninglong Lu; Ibrahim N. Hajj (ISQED, 2001)