The design and implementation of a DVB receiving chip with PCI interface. - Ningyi Xu; Shaohua Li; Wei Yu; Guanghui He; Hao Zhang; Fei Luo; Zucheng Zhou (ASP-DAC, 2005)

A single receiving chip for DVB data broadcasting system. - Guanghui He; Ningyi Xu; Wei Yu; Zucheng Zhou (IEEE Trans. Consumer Electron., 2006)

FPGA-based Accelerator Design for RankBoost in Web Search Engines. - Ning-Yi Xu; Xiongfei Cai; Rui Gao; Lei Zhang 001; Feng-Hsiung Hsu (FPT, 2007)

Distributed RankBoost Acceleration Using FPGA and MPI for Web Relevance Ranking. - Zhijun Li; Ning-Yi Xu; Feng-Hsiung Hsu; Xiongfei Cai; Rui Gao; Zenglin Xia (ICPADS, 2008)

An Efficient Lossless Compression Method for Internet Search Data in Hardware Accelerators. - Jing Yan; Rong Luo; Rui Gao; Ningyi Xu (CSIE (3), 2009)

FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture. - Jing Yan; Ningyi Xu; Xiongfei Cai; Rui Gao; Yu Wang 002; Rong Luo; Feng-Hsiung Hsu (FPL, 2009)

RankBoost Acceleration on both NVIDIA CUDA and ATI Stream Platforms. - Bo Wang 067; Tianji Wu; Feng Yan 003; Ruirui Li; Ningyi Xu; Yu Wang 002 (ICPADS, 2009)

FTL design exploration in reconfigurable high-performance SSD for server applications. - Ji-Yong Shin; Zenglin Xia; Ning-Yi Xu; Rui Gao; Xiongfei Cai; Seungryoul Maeng; Feng-Hsiung Hsu (ICS, 2009)

Parallel Inference for Latent Dirichlet Allocation on Graphics Processing Units. - Feng Yan 003; Ningyi Xu; Yuan (Alan) Qi (NIPS, 2009)

FPGA Acceleration of RankBoost in Web Search Engines. - Ningyi Xu; Xiongfei Cai; Rui Gao; Lei Zhang 001; Feng-Hsiung Hsu (ACM Trans. Reconfigurable Technol. Syst., 2009)

FPMR: MapReduce framework on FPGA. - Yi Shan; Bo Wang 067; Jing Yan; Yu Wang 002; Ningyi Xu; Huazhong Yang (FPGA, 2010)

LambdaRank acceleration for relevance ranking in web search engines (abstract only). - Jing Yan; Ningyi Xu; Xiongfei Cai; Rui Gao; Yu Wang 002; Rong Luo; Feng-Hsiung Hsu (FPGA, 2010)

A compression method for inverted index and its FPGA-based decompression solution. - Jing Yan; Ningyi Xu; Zenglin Xia; Rong Luo; Feng-Hsiung Hsu (FPT, 2010)

Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis. - Di Wu 013; Tianji Wu; Yi Shan; Yu Wang 002; Yong He 002; Ningyi Xu; Huazhong Yang (ICPADS, 2010)

Efficient PageRank and SpMV Computation on AMD GPUs. - Tianji Wu; Bo Wang 067; Yi Shan; Feng Yan 003; Yu Wang 002; Ningyi Xu (ICPP, 2010)

FPGA and GPU implementation of large scale SpMV. - Yi Shan; Tianji Wu; Yu Wang 002; Bo Wang 067; Zilong Wang; Ningyi Xu; Huazhong Yang (SASP, 2010)

Gemma in April: A matrix-like parallel programming architecture on OpenCL. - Tianji Wu; Di Wu 013; Yu Wang 002; Xiaorui Zhang; Hong Luo; Ningyi Xu; Huazhong Yang (DATE, 2011)

A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis. - Yu Wang 002; Mo Xu; Ling Ren 001; Xiaorui Zhang; Di Wu 013; Yong He 002; Ningyi Xu; Huazhong Yang (ICCAD, 2011)

An FPGA-based accelerator for LambdaRank in Web search engines. - Jing Yan; Ning-Yi Xu; Xiongfei Cai; Rui Gao; Yu Wang 002; Rong Luo; Feng-Hsiung Hsu (ACM Trans. Reconfigurable Technol. Syst., 2011)

Efficient Query Processing for Web Search Engine with FPGAs. - Jing Yan; Zhanxiang Zhao; Ning-Yi Xu; Xi Jin; Lin-Tao Zhang; Feng-Hsiung Hsu (FCCM, 2012)

The Analysis of Research Hotspots and Fronts of Knowledge Visualization Based on CiteSpace II. - Huiling Chen; Guoqing Zhao; Ningyi Xu (ICHL, 2012)

The Colored Concept Map and Its Application in Learning Assistance Program. - Ningyi Xu; Guoqing Zhao; Huiling Chen; Leisi Pei (ICHL, 2012)

Probabilistic Brain Fiber Tractography on GPUs. - Mo Xu; Xiaorui Zhang; Yu Wang 002; Ling Ren 001; Ziyu Wen; Yi Xu; Gaolang Gong; Ningyi Xu; Huazhong Yang (IPDPS Workshops, 2012)

Energy efficient neural networks for big data analytics. - Yu Wang 002; Boxun Li; Rong Luo; Yiran Chen 001; Ningyi Xu; Huazhong Yang (DATE, 2014)

Large scale recurrent neural network on GPU. - Boxun Li; Erjin Zhou; Bo Huang; Jiayi Duan; Yu Wang 002; Ningyi Xu; Jiaxing Zhang; Huazhong Yang (IJCNN, 2014)

Real-Time High-Quality Stereo Vision System in FPGA. - Wenqiang Wang; Jing Yan; Ningyi Xu; Yu Wang 002; Feng-Hsiung Hsu (IEEE Trans. Circuits Syst. Video Technol., 2015)

Going Deeper with Embedded FPGA Platform for Convolutional Neural Network. - Jiantao Qiu; Jie Wang 022; Song Yao; Kaiyuan Guo; Boxun Li; Erjin Zhou; Jincheng Yu; Tianqi Tang 001; Ningyi Xu; Sen Song; Yu Wang 002; Huazhong Yang (FPGA, 2016)

ClickNP: Highly flexible and High-performance Network Processing with Reconfigurable Hardware. - Bojie Li; Kun Tan; Layong Larry Luo; Yanqing Peng; Renqian Luo; Ningyi Xu; Yongqiang Xiong; Peng Cheng 005 (SIGCOMM, 2016)

Using Data Compression for Optimizing FPGA-Based Convolutional Neural Network Accelerators. - Yijin Guan; Ningyi Xu; Chen Zhang 001; Zhihang Yuan; Jason Cong (APPT, 2017)

The Feniks FPGA Operating System for Cloud Computing. - Jiansong Zhang 001; Yongqiang Xiong; Ningyi Xu; Ran Shu 001; Bojie Li; Peng Cheng 005; Guo Chen 001; Thomas Moscibroda (APSys, 2017)

FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates. - Yijin Guan; Hao Liang 003; Ningyi Xu; Wenqiang Wang; Shaoshuai Shi; Xi Chen 107; Guangyu Sun 003; Wei Zhang 012; Jason Cong (FCCM, 2017)

ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. - Guohao Dai; Tianhao Huang; Yuze Chi; Ningyi Xu; Yu Wang 002; Huazhong Yang (FPGA, 2017)

FxpNet: Training a deep convolutional neural network in fixed-point representation. - Xi Chen 107; Xiaolin Hu; Hucheng Zhou; Ningyi Xu (IJCNN, 2017)

FlexSaaS: A Reconfigurable Accelerator for Web Search Selection. - Shijie Cao; Lanshun Nie; De-chen Zhan; Wenqiang Wang; Ningyi Xu; Ramashis Das; Ming Wu 007; Lintao Zhang; Derek Chiou (ACM Trans. Reconfigurable Technol. Syst., 2019)

Enhanced Power Decoupling Strategy for Virtual Synchronous Generator. - Mingxuan Li; Yue Wang 018; Yonghui Liu; Ningyi Xu; Sirui Shu; Wanjun Lei (IEEE Access, 2020)

Crane: Mitigating Accelerator Under-utilization Caused by Sparsity Irregularities in CNNs. - Yijin Guan; Guangyu Sun 003; Zhihang Yuan; Xingchen Li; Ningyi Xu; Shu Chen; Jason Cong; Yuan Xie 001 (IEEE Trans. Computers, 2020)

CCASM: A Computation- and Communication-Aware Scheduling and Mapping Algorithm for NoC-Based DNN Accelerators. - Xi Fan; Xuyan Wang; Yaoyao Ye; Xianglun Leng; Ningyi Xu; Guanghui He (ASICON, 2021)

A Low-Latency FPGA Implementation for Real-Time Object Detection. - Jinming Zhang; Lifu Cheng; Cen Li; Yongfu Li 002; Guanghui He; Ningyi Xu; Yong Lian 001 (ISCAS, 2021)

Efficient Compression Methods for Wire-Spread-Based Stochastic Computing Deep Neural Networks. - Wenjie Li 003; Ningyi Xu; Runsheng Wang; Guanghui He (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling. - Dongxu Lyu; Zhenyu Li; Yuzhou Chen; Ningyi Xu; Guanghui He (DAC, 2023)

COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies. - Zhican Wang; Gang Wang 063; Honglan Jiang; Ningyi Xu; Guanghui He (DAC, 2023)

Adam Accumulation to Reduce Memory Footprints of Both Activations and Gradients for Large-Scale DNN Training. - Yijia Zhang; Yibo Han; Shijie Cao; Guohao Dai; Youshan Miao; Ting Cao; Fan Yang 024; Ningyi Xu (ECAI, 2023)

A Point Transformer Accelerator with Fine-Grained Pipelines and Distribution-Aware Dynamic FPS. - Yaoxiu Lian; Xinhao Yang; Ke Hong; Yu Wang 002; Guohao Dai; Ningyi Xu (ICCAD, 2023)

SpOctA: A 3D Sparse Convolution Accelerator with Octree-Encoding-Based Map Search and Inherent Sparsity-Aware Processing. - Dongxu Lyu; Zhenyu Li; Yuzhou Chen; Jinming Zhang; Ningyi Xu; Guanghui He (ICCAD, 2023)

Exploiting Hardware Utilization and Adaptive Dataflow for Efficient Sparse Convolution in 3D Point Clouds. - Ke Hong; Zhongming Yu; Guohao Dai; Xinhao Yang; Yaoxiu Lian; Zehao Liu; Ningyi Xu; Yuhan Dong; Yu Wang 002 (MLSys, 2023)

History-Detr: Optimize Query Initialization Strategy by Using Historical Information and Kinematics. - Weijie Luo; Zihao Liu; Guohao Dai; Ningyi Xu (MMAsia, 2023)

Integer or Floating Point? New Outlooks for Low-Bit Quantization on Large Language Models. - Yijia Zhang; Lingran Zhao; Shijie Cao; Wenqiang Wang; Ting Cao; Fan Yang 024; Mao Yang 004; Shanghang Zhang; Ningyi Xu (CoRR, 2023)

Large Trajectory Models are Scalable Motion Predictors and Planners. - Qiao Sun; Shiduo Zhang; Danjiao Ma; Jingzhe Shi; Derun Li; Simian Luo; Yu Wang 177; Ningyi Xu; Guangzhi Cao; Hang Zhao (CoRR, 2023)

NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN. - Ye Liu 011; Fei Wu; Neng Zhao; Qirong Zhang; Wenqiang Wang; Yutong Yang; Xiangting Li; Sixu Li; Zili Huang; Shuang Hao 005; Guangbin Ou; Liang Zhou; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Low-Complexity Precision-Scalable Multiply-Accumulate Unit Architectures for Deep Neural Network Accelerators. - Wenjie Li 003; Aokun Hu; Gang Wang 063; Ningyi Xu; Guanghui He (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

BitDistiller: Unleashing the Potential of Sub-4-Bit LLMs via Self-Distillation. - Dayou Du; Yijia Zhang; Shijie Cao; Jiaqi Guo; Ting Cao; Xiaowen Chu 001; Ningyi Xu (ACL (1), 2024)

AFPQ: Asymmetric Floating Point Quantization for LLMs. - Yijia Zhang; Sicheng Zhang; Shijie Cao; Dayou Du; Jianyu Wei; Ting Cao; Ningyi Xu (ACL (Findings), 2024)

Leveraging Enhanced Queries of Point Sets for Vectorized Map Construction. - Zihao Liu; Xiaoyu Zhang 017; Guangwei Liu; Ji Zhao 001; Ningyi Xu (ECCV (57), 2024)

Enhancing Vectorized Map Perception with Historical Rasterized Maps. - Xiaoyu Zhang 017; Guangwei Liu; Zihao Liu; Ningyi Xu; Yun-Hui Liu 001; Ji Zhao 001 (ECCV (17), 2024)

MARCA: Mamba Accelerator with Reconfigurable Architecture. - Jinhao Li 006; Shan Huang 010; Jiaming Xu; Jun Liu 071; Li Ding 012; Ningyi Xu; Guohao Dai (ICCAD, 2024)

VEGA: Implementing a Versatile and Efficient Deep Learning Processor with Graph-Based ALU. - Wenqiang Wang; Yuzhou Chen; Guanting Huo; Guanghui He; Ningyi Xu (ICCD, 2024)

Integer or Floating Point? New Outlooks for Low-Bit Quantization on Large Language Models. - Yijia Zhang; Lingran Zhao; Shijie Cao; Sicheng Zhang; Wenqiang Wang; Ting Cao; Fan Yang 024; Mao Yang 004; Shanghang Zhang; Ningyi Xu (ICME, 2024)

Hardware-oriented algorithms for softmax and layer normalization of large language models. - Wenjie Li 003; Dongxu Lyu; Gang Wang 063; Aokun Hu; Ningyi Xu; Guanghui He (Sci. China Inf. Sci., 2024)

Cross Anything: General Quadruped Robot Navigation through Complex Terrains. - Shaoting Zhu; Derun Li; Yong Liu; Ningyi Xu; Hang Zhao (CoRR, 2024)

Automating Energy-Efficient GPU Kernel Generation: A Fast Search-Based Compilation Approach. - Yijia Zhang; Zhihong Gou; Shijie Cao; Weigang Feng; Sicheng Zhang; Guohao Dai; Ningyi Xu (CoRR, 2024)

A Precision-Scalable Deep Neural Network Accelerator With Activation Sparsity Exploitation. - Wenjie Li 003; Aokun Hu; Ningyi Xu; Guanghui He (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

INDM: Chiplet-Based Interconnect Network and Dataflow Mapping for DNN Accelerators. - Jinming Zhang; Xi Fan; Yaoyao Ye; Xuyan Wang; Guojie Xiong; Xianglun Leng; Ningyi Xu; Yong Lian 001; Guanghui He (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Quantization and Hardware Architecture Co-Design for Matrix-Vector Multiplications of Large Language Models. - Wenjie Li 003; Aokun Hu; Ningyi Xu; Guanghui He (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

CoDA: A Co-Design Framework for Versatile and Efficient Attention Accelerators. - Wenjie Li 003; Aokun Hu; Ningyi Xu; Guanghui He (IEEE Trans. Computers, 2024)

M2M: A Fine-Grained Mapping Framework to Accelerate Multiple DNNs on a Multi-Chiplet Architecture. - Jinming Zhang; Xuyan Wang; Yaoyao Ye; Dongxu Lyu; Guojie Xiong; Ningyi Xu; Yong Lian 001; Guanghui He (IEEE Trans. Very Large Scale Integr. Syst., 2024)

LLSM: LLM-enhanced Logic Synthesis Model with EDA-guided CoT Prompting, Hybrid Embedding and AIG-tailored Acceleration. - Shan Huang 010; Jinhao Li 006; Zhen Yu; Jiancai Ye; Jiaming Xu; Ningyi Xu; Guohao Dai (ASP-DAC, 2025)

DyLGNN: Efficient LM-GNN Fine-Tuning with Dynamic Node Partitioning, Low-Degree Sparsity, and Asynchronous Sub-Batch. - Zhen Yu; Jinhao Li 006; Jiaming Xu; Shan Huang 010; Jiancai Ye; Ningyi Xu; Guohao Dai (DATE, 2025)

DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale. - Ziyang Zheng; Shan Huang 010; Jianyuan Zhong; Zhengyuan Shi; Guohao Dai; Ningyi Xu; Qiang Xu 001 (ICLR, 2025)

Efficient multi-GPU implementations of preconditioned conjugate gradient method. - Tailai Ma; Zhihong Gou; Ningyi Xu; Shuli Sun (Adv. Eng. Softw., 2025)

A Point Transformer Accelerator With Distribution-Aware Heuristic Distance Calculation. - Yaoxiu Lian; Xinhao Yang; Ke Hong; Yu Wang 002; Ningyi Xu; Guohao Dai (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Hierarchical Balance Packing: Towards Efficient Supervised Fine-tuning for Long-Context LLM. - Yongqiang Yao; Jingru Tan; Kaihuan Liang; Feizhao Zhang; Yazhe Niu; Jiahao Hu; Ruihao Gong; Dahua Lin; Ningyi Xu (CoRR, 2025)

Finetuning Generative Trajectory Model with Reinforcement Learning from Human Feedback. - Derun Li; Jianwei Ren; Yue Wang 018; Xin Wen; Pengxiang Li; Leimeng Xu; Kun Zhan; Zhongpu Xia; Peng Jia; Xianpeng Lang; Ningyi Xu; Hang Zhao (CoRR, 2025)

ROMA: a Read-Only-Memory-based Accelerator for QLoRA-based On-Device LLM. - Wenqiang Wang; Yijia Zhang; Zikai Zhang; Guanting Huo; Hao Liang 003; Shijie Cao; Ningyi Xu (CoRR, 2025)

Speculative Decoding for Verilog: Speed and Quality, All in One. - Changran Xu; Yi Liu; Yunhao Zhou; Shan Huang 010; Ningyi Xu; Qiang Xu 001 (CoRR, 2025)

Efficient Hardware Architecture Design for Rotary Position Embedding of Large Language Models. - Wenjie Li 003; Gang Wang 063; Dongxu Lyu; Ningyi Xu; Guanghui He (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

CCSS: Hardware-Accelerated RTL Simulation with Fast Combinational Logic Computing and Sequential Logic Synchronization. - Weigang Feng; Yijia Zhang; Zekun Wang; Zhengyang Wang; Yi Wang; Peijun Ma; Ningyi Xu (CoRR, 2025)

IPDR: An Inter-Chiplet Priority-Driven Deadlock Resolution for 2-D/2.5-D Multichiplet Systems. - Jinming Zhang; Zhihong Chen; Yaoyao Ye; Hao Chen; Xiao Han; Jianfei Jiang 001; Weiguang Sheng; Ningyi Xu; Yong Lian 001; Guanghui He (IEEE Trans. Very Large Scale Integr. Syst., 2025)