Minimizing area and power of sequential CMOS circuits using threshold decomposition. - Niranjan Kulkarni; Nishant Nukala; Sarma B. K. Vrudhula (ICCAD, 2012)

Spintronic Threshold Logic Array (STLA) - A compact, low leakage, non-volatile gate array architecture. - Nishant Nukala; Niranjan Kulkarni; Sarma B. K. Vrudhula (J. Parallel Distributed Comput., 2014)

Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. - Vivek Nautiyal; Nishant Nukala; Fakhruddin Ali Bohra; Sagar Dwivedi; Jitendra Dasani; Satinderjit Singh; Gaurav Singla; Martin Kinkade (ISQED, 2018)