X-Tolerant Test Response Compaction. - Subhasish Mitra; Steven S. Lumetta; Michael Mitzenmacher; Nishant Patil (IEEE Des. Test Comput., 2005)

Signature Analyzer Design for Yield Learning Support. - Nishant Patil; Subhasish Mitra; Steven S. Lumetta (ITC, 2006)

Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits. - Nishant Patil; Jie Deng; H.-S. Philip Wong; Subhasish Mitra (DAC, 2007)

Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections. - Jie Deng; Nishant Patil; Koungmin Ryu; Alexander Badmaev; Chongwu Zhou; Subhasish Mitra; H.-S. Philip Wong (ISSCC, 2007)

Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. - Jie Zhang 007; Nishant Patil; Subhasish Mitra (DATE, 2008)

Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits. - Nishant Patil; Jie Deng; Albert Lin 002; H.-S. Philip Wong; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions. - Nishant Patil; Albert Lin 002; Jie Zhang 007; H.-S. Philip Wong; Subhasish Mitra (DAC, 2009)

Carbon nanotube circuits in the presence of carbon nanotube density variations. - Jie Zhang 007; Nishant Patil; Arash Hazeghi; Subhasish Mitra (DAC, 2009)

Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors. - Subhasish Mitra; Jie Zhang 007; Nishant Patil; Hai Wei (DATE, 2009)

Imperfection-immune Carbon Nanotube digital VLSI. - Nishant Patil; Subhasish Mitra (ICCD, 2009)

Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. - Jie Zhang 007; Nishant Patil; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. - Jie Zhang 007; Shashikanth Bobba; Nishant Patil; Albert Lin 002; H.-S. Philip Wong; Giovanni De Micheli; Subhasish Mitra (DAC, 2010)

Carbon nanotube circuits: Living with imperfections and variations. - Jie Zhang 007; Nishant Patil; Albert Lin 002; H.-S. Philip Wong; Subhasish Mitra (DATE, 2010)

Efficient FPGAs using nanoelectromechanical relays. - Chen Chen 018; Roozbeh Parsa; Nishant Patil; Soogine Chong; Kerem Akarvardar; J. Provine; David Lewis; Jeff Watt; Roger T. Howe; H.-S. Philip Wong; Subhasish Mitra (FPGA, 2010)

Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated. - Hai Wei; Jie Zhang 007; Lan Wei; Nishant Patil; Albert Lin 002; Max M. Shulaker; Hong-Yu Chen; H.-S. Philip Wong; Subhasish Mitra (ICCAD, 2011)

Robust System Design. - Subhasish Mitra; Hyungmin Cho; Ted Hong; Young Moon Kim; Hsiao-Heng Lee; Larkhoon Leem; Yanjing Li; David Lin; Evelyn Mintarno; Diana Mui; Sung-Boem Park; Nishant Patil; et al. (IPSJ Trans. Syst. LSI Des. Methodol., 2011)

Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations. - Jie Zhang 007; Nishant Patil; Arash Hazeghi; H.-S. Philip Wong; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Carbon Nanotube Robust Digital VLSI. - Jie Zhang 007; Albert Lin 002; Nishant Patil; Hai Wei; Lan Wei; H.-S. Philip Wong; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Google's Neural Machine Translation System: Bridging the Gap between Human and Machine Translation. - Yonghui Wu; Mike Schuster; Zhifeng Chen; Quoc V. Le; Mohammad Norouzi 002; Wolfgang Macherey; Maxim Krikun; Yuan Cao 007; Qin Gao; Klaus Macherey; Jeff Klingner; Apurva Shah; et al. (CoRR, 2016)

In-Datacenter Performance Analysis of a Tensor Processing Unit. - Norman P. Jouppi; Cliff Young; Nishant Patil; David A. Patterson 001; Gaurav Agrawal; Raminder Bajwa; Sarah Bates; Suresh Bhatia; Nan Boden; Al Borchers; Rick Boyle; Pierre-luc Cantin; et al. (ISCA, 2017)

In-Datacenter Performance Analysis of a Tensor Processing Unit. - Norman P. Jouppi; Cliff Young; Nishant Patil; David A. Patterson 001; Gaurav Agrawal; Raminder Bajwa; Sarah Bates; Suresh Bhatia; Nan Boden; Al Borchers; Rick Boyle; Pierre-luc Cantin; et al. (CoRR, 2017)

A domain-specific architecture for deep neural networks. - Norman P. Jouppi; Cliff Young; Nishant Patil; David A. Patterson 001 (Commun. ACM, 2018)

Motivation for and Evaluation of the First Tensor Processing Unit. - Norman P. Jouppi; Cliff Young; Nishant Patil; David A. Patterson 001 (IEEE Micro, 2018)

Google's Training Chips Revealed: TPUv2 and TPUv3. - Thomas Norrie; Nishant Patil; Doe Hyun Yoon; George Kurian; Sheng Li 007; James Laudon; Cliff Young; Norman P. Jouppi; David A. Patterson 001 (Hot Chips Symposium, 2020)

A domain-specific supercomputer for training deep neural networks. - Norman P. Jouppi; Doe Hyun Yoon; George Kurian; Sheng Li 007; Nishant Patil; James Laudon; Cliff Young; David A. Patterson 001 (Commun. ACM, 2020)

Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product. - Norman P. Jouppi; Doe Hyun Yoon; Matthew Ashcraft; Mark Gottscho; Thomas B. Jablin; George Kurian; James Laudon; Sheng Li 007; Peter C. Ma; Xiaoyu Ma; Thomas Norrie; Nishant Patil; et al. (ISCA, 2021)

The Design Process for Google's Training Chips: TPUv2 and TPUv3. - Thomas Norrie; Nishant Patil; Doe Hyun Yoon; George Kurian; Sheng Li 007; James Laudon; Cliff Young; Norman P. Jouppi; David A. Patterson 001 (IEEE Micro, 2021)

Area and Power Efficient Receiver for Narrowband Internet of Things Applications. - Nishant Patil; Sankaran Aniruddhan (SENSORS, 2023)

Understanding and Mitigating Hardware Failures in Deep Learning Training Systems. - Yi He 010; Mike Hutton; Steven Chan; Robert De Gruijl; Rama Govindaraju; Nishant Patil; Yanjing Li (ISCA, 2023)

TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings. - Norman P. Jouppi; George Kurian; Sheng Li 007; Peter C. Ma; Rahul Nagarajan; Lifeng Nai; Nishant Patil; Suvinay Subramanian; Andy Swing; Brian Towles; Cliff Young; Xiang Zhou; et al. (ISCA, 2023)

A 3-to-13 GHz Quasi-Elliptic Higher-Order N-path Filter. - Nishant Patil; Abdul R. Hossain; Sasank Garikapati; Harish Krishnaswamy; Aravind Nagulu (MWSCAS, 2024)