A Multi-Context Neural Core Design for Reconfigurable Neuromorphic Arrays. - Adam Z. Foshie; Nishith N. Chakraborty; John J. Murray; Tanner J. Fowler; Mst Shamim Ara Shawkat; Garrett S. Rose (ISVLSI, 2021)

Programmable Refractory Period Implementations in a Mixed-Signal Integrate-And-Fire Neuron. - Nishith N. Chakraborty; Garrett S. Rose; Min H. Kao (ISCAS, 2022)

STDP Based Online Learning for a Current-Controlled Memristive Synapse. - Ryan Weiss; Hritom Das; Nishith N. Chakraborty; Garrett S. Rose (MWSCAS, 2022)

A Mixed-Signal Short-Term Plasticity Implementation for a Current-Controlled Memristive Synapse. - Nishith N. Chakraborty; Hritom Das; Garrett S. Rose (ACM Great Lakes Symposium on VLSI, 2023)

Spike-Timing-Dependent Plasticity for a Hafnium-Oxide Memristive Synapse. - Nishith N. Chakraborty; Hritom Das; Garrett S. Rose (MWSCAS, 2023)

Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic Core. - Nishith N. Chakraborty; Hritom Das; Garrett S. Rose (MWSCAS, 2023)

Homeostatic Plasticity in a Leaky Integrate and Fire Neuron Using Tunable Leak. - Nishith N. Chakraborty; Hritom Das; Garrett S. Rose (MWSCAS, 2023)

Energy Efficient and High-Performance Synaptic Operating Point Evaluation for SNN Applications. - Nishith N. Chakraborty; SNB Tushar; Hritom Das; Garrett S. Rose (MWSCAS, 2023)

Enhanced Read Resolution in Reconfigurable Memristive Synapses for Spiking Neural Networks. - Hritom Das; Nishith N. Chakraborty; Catherine D. Schuman; Garrett S. Rose (CoRR, 2023)

Optimizations for a Current-Controlled Memristor- Based Neuromorphic Synapse Design. - Hritom Das; Rocco D. Febbo; Charles P. Rizzo; Nishith N. Chakraborty; James S. Plank; Garrett S. Rose (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

An Efficient and Accurate Memristive Memory for Array-Based Spiking Neural Networks. - Hritom Das; Rocco D. Febbo; Sree Nirmillo Biswash Tushar; Nishith N. Chakraborty; Maximilian Liehr; Nathaniel C. Cady; Garrett S. Rose (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Memristive Reconfigurable Neuromorphic Array for Neuro-Inspired Dynamic Architectures. - Hritom Das; Nishith N. Chakraborty; Manu Rathore; Sk Hasibul Alam; Catherine D. Schuman; Garrett S. Rose (ISVLSI, 2024)

Hardware-Application Co-Design to Evaluate the Performance of an STDP-based Reservoir Computer. - Hritom Das; Karan P. Patel; Shelah Ameli; Nishith N. Chakraborty; Catherine D. Schuman; Garrett S. Rose (ISVLSI, 2024)

Hardware software co-design for leveraging STDP in a memristive neuroprocessor. - Nishith N. Chakraborty; Shelah Ameli; Hritom Das; Catherine D. Schuman; Garrett S. Rose (Neuromorph. Comput. Eng., 2024)